Floating-Point to Fixed-Point Conversion for Formal Verification

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing electronic design verification methods face challenges in handling floating-point hardware, as Boolean representations for formal engines like SAT and BDD are difficult to implement and debug, especially in mixed-signal environments where analog and digital variables interact.

Innovation Solution

Converting floating-point variables to fixed-point variables, allowing the use of formal engines like SAT and BDD engines to process the electronic design, and enabling user-configurable fixed-point implementations to handle both integer and real variables effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If floating-point variables are used in electronic design verification, then the design can represent real-world analog signals and mixed-signal environments accurately, but the Boolean representations for formal engines become extremely difficult to implement and debug

Engineering Contradiction:

Improverepresentation accuracy of floating-point variablesVSAvoidcomplexity of Boolean representations for formal engines

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by converting floating-point variables to fixed-point variables with specific precision and range parameters. This transformation maintains the essential behavior of floating-point numbers while expressing them in a format compatible with formal verification engines, thereby resolving the contradiction between representation accuracy and engine compatibility.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces fixed-point representation as an intermediary between floating-point variables and formal engines. This intermediary layer translates the difficult-to-handle floating-point Boolean representations into simpler fixed-point forms that formal engines can process, while preserving the semantic meaning of the original floating-point values.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If floating-point hardware is used, then mixed-signal environments can be modeled accurately, but the analogous Boolean representations for formal engines are extremely difficult to implement

Engineering Contradiction:

Improveability to handle mixed-signal environmentsVSAvoidease of implementing Boolean representations

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent transforms floating-point parameters into fixed-point parameters, converting the continuous analog domain into a discrete digital domain that formal engines can handle. This parameter transformation enables mixed-signal environment modeling while making Boolean representations tractable and implementable.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the complex Boolean mechanics of floating-point verification with a simplified fixed-point representation system. This replacement maintains the ability to verify mixed-signal designs while using formal engine mechanisms that are simpler to implement and debug.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If fixed-point implementation is used, then formal engines can process the electronic design efficiently, but the fixed-point implementation details must be configured and adjusted

Engineering Contradiction:

Improveprocessing efficiency of formal enginesVSAvoidcomplexity of fixed-point implementation configuration

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent performs preliminary conversion of floating-point variables to fixed-point variables before formal verification. This preliminary action prepares the design in advance for efficient formal engine processing, establishing the fixed-point representation once and reusing it throughout the verification process to maintain high productivity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements self-service through automatic or semi-automatic generation of fixed-point implementation details based on the original floating-point design. This reduces the manual configuration burden while maintaining the benefits of fixed-point processing efficiency.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS8875069B1System and method for generating constrained random values associated with an electronic design

Publication Date: 2014.10.28 CADENCE DESIGN SYST INC

AI summary

The present disclosure relates to a computer-implemented method for electronic design verification. The method may include providing, using one or more processors, an electronic design having at least one floating point variable associated therewith. The method may further include converting the at least one floating point variable of the electronic design to a fixed point variable to generate a fixed point implementation of the electronic design. The method may also include processing, using a formal engine, the fixed point implementation of the electronic design.