Floating-Point Format Conversion for Precision-Power Tradeoffs

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Solution Overview

Problem

General-purpose processors are limited to computing floating-point numbers of a single format, leading to unnecessary accuracy and increased power consumption, especially in applications like neural networks where varying levels of accuracy are required.

Innovation Solution

A floating-point number processor that converts floating-point numbers between different bit lengths, allowing for flexible computation by adjusting the bit lengths of the exponent and mantissa fields based on calculated exponent bit lengths and base values, enabling efficient processing with reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If floating-point numbers of high accuracy (greater bit length) are used, then measurement precision is improved, but use of energy increases

Engineering Contradiction:
Improveaccuracy of floating-point numbersVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the bit length of floating-point numbers adjustable rather than fixed. The processor can dynamically change the exponent bit length and mantissa bit length based on the computational requirements of different applications. This allows the system to use higher precision (more bits) when needed for accuracy-critical operations and lower precision (fewer bits) when sufficient for the task, thereby optimizing the trade-off between measurement precision and energy consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter changes by allowing modification of the floating-point number format parameters, specifically the exponent bit length and mantissa bit length. The processor can switch between different configurations (e.g., IEEE 754 single precision with 8-bit exponent and 23-bit mantissa, or half precision with 5-bit exponent and 10-bit mantissa) to match the requirements of different computational tasks, thus adjusting both precision and energy usage accordingly.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If floating-point numbers of high accuracy (greater bit length) are used, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveaccuracy of floating-point numbersVSAvoidcomplexity of floating-point number processor
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by designing a floating-point number processor that can handle multiple formats and precision levels within a single device. The processor is configured to support different exponent bit lengths and mantissa bit lengths, allowing it to perform both high-precision and low-precision computations. This multi-functionality eliminates the need for separate processors for different precision requirements, thereby managing device complexity while providing flexibility in accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If floating-point numbers of a single format are used, then device complexity is reduced, but adaptability worsens

Engineering Contradiction:
Improvesimplicity of processor configurationVSAvoidflexibility in computing different formats
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by enabling the processor to adapt its configuration dynamically based on the computational workload. The system can switch between different floating-point formats (e.g., changing exponent and mantissa bit lengths) to match the requirements of different applications such as neural network training versus inference, thus achieving high adaptability without permanently increasing device complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10574260B2Techniques for floating-point number conversion
Publication Date: 2020.02.25 CAMBRICON TECH CO LTD
  • US10574260B2 patent drawing
  • US10574260B2 patent drawing
  • US10574260B2 patent drawing

AI summary

Aspects for converting floating-point numbers in a processor are described herein. As an example, the aspects may include receiving, by a floating-point number converter, an exponent bit length, a base value, and one or more first floating-point numbers of a first bit length. Further, the aspects may include calculating, by the floating-point number converter, one or more second floating-point numbers of a second bit length based on the exponent bit length and the base value, the one or more second floating-point numbers respectively corresponding to the one or more first floating-point numbers.