Floating-Point Neural Computing for Data Reuse in Convolution
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Solution Overview
Problem
Current neural networks face inefficiencies in processing floating-point-type data during multiplication and addition operations, leading to low computational efficiency.
Innovation Solution
A computing apparatus and method utilizing a floating-point multiplier and adder units to perform neural network operations, enabling efficient multiplication and summation of weight and neuron data, with an update unit for multiple summation operations to reuse data and reduce data migration and storage needs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional multipliers are used for neural network operations, then basic multiplication functionality is provided, but execution efficiency for floating-point data remains insufficient
Solution Approach 1:
The patent applies parameter changes by transforming the data representation format from conventional fixed-point or integer formats to floating-point format. This enables the multiplier to efficiently process floating-point neural network data (weights and neurons) by changing the numerical parameter representation, thereby improving computation efficiency and reducing execution time for floating-point operations
2Productivity
If weight data and neuron data are processed separately without optimization, then complete computation is achieved, but data migration and storage requirements increase
Solution Approach 1:
The patent merges the processing of weight data and neuron data into a unified floating-point computation framework. By combining both data types in the same floating-point multiplier and using consistent floating-point representation, the system eliminates the need for separate data conversion and storage mechanisms, reducing data migration overhead and storage requirements while maintaining complete computation functionality
Data Source
AI summary
The present disclosure relates to a computing apparatus, a method, an integrated circuit chip and an integrated circuit device for performing a neural network operation. The computing apparatus may be included in a combined processing apparatus. The combined processing apparatus may further include a general interconnection interface and other processing apparatus. The computing apparatus interacts with other processing apparatus to jointly complete calculation operations specified by users. The combined processing apparatus may further include a storage apparatus. The storage apparatus is respectively connected to the computing apparatus and other processing apparatus, and the storage apparatus is used for storing data of the computing apparatus and other processing apparatus. Solutions of the present disclosure may be widely applied to various floating-point data computations.