Floating-Point Processor Selectable Subprecision Power
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Solution Overview
Problem
Existing floating-point processors are inefficient as they are limited to fixed precision formats (single and double), leading to unnecessary power consumption in applications that require varying levels of precision, particularly in battery-operated devices where power is a premium.
Innovation Solution
A floating-point processor with selectable subprecision, featuring a controller that determines a subset of bits based on user-selected precision for floating-point operations, allowing for reduced precision usage only when necessary, thereby optimizing power usage and computational efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If higher precision floating-point format is used, then measurement precision is improved, but use of energy increases
Solution Approach 1:
The floating-point processor dynamically adjusts its precision level based on the specific application requirements. The controller can selectively enable or disable certain mantissa bits (e.g., using only 16 bits out of 24 bits for single-precision operations), allowing the system to transition between high-precision and low-precision modes as needed, thereby optimizing power consumption while maintaining required accuracy.
Solution Approach 2:
The invention changes the precision parameter of the floating-point format from a fixed value to a selectable value. By allowing the system to switch between different precision levels (e.g., full single-precision 24-bit mantissa, reduced 16-bit mantissa, or other intermediate levels), the processor can adapt to different computational requirements and minimize energy consumption by using the lowest necessary precision.
2Measurement precision
If higher precision floating-point format is used, then measurement precision is improved, but computational intensity increases
Solution Approach 1:
For applications that do not require full precision, the processor performs computations using only a subset of the available mantissa bits (partial action). This reduces the computational workload and increases efficiency for tasks where full precision is unnecessary, while still maintaining adequate accuracy for the specific application.
3Device complexity
If fixed precision format is used, then device complexity is reduced, but adaptability decreases
Solution Approach 1:
The floating-point processor is designed to perform multiple precision levels using the same hardware structure. By incorporating control logic that can selectively enable different subsets of mantissa bits, the processor achieves multi-functionality, serving both high-precision applications (when needed) and low-precision applications (for power-sensitive tasks) without requiring separate dedicated hardware for each precision level.
Data Source
AI summary
A floating-point processor with selectable subprecision includes a register configured to store a plurality of bits in a floating-point format, a controller, and a floating-point mathematical operator. The controller is configured to select a subprecision for a floating-point operation, in response to user input. The controller is configured to determine a subset of the bits, in accordance with the selected subprecision. The floating-point operator is configured to perform the floating-point operation using only the subset of the bits. Excess bits that are not used in the floating-point operation may be forced into a low-leakage state. The output value resulting from the floating-point operation is either truncated or rounded to the selected subprecision.