Floating Point Round-off Amount Determination Processor Instruction

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Solution Overview

Problem

Current processors lack efficient instructions for determining floating-point round-off amounts, requiring complex operations to round floating-point numbers to integers and back, which can lead to errors and inefficiencies.

Innovation Solution

The introduction of floating-point round-off amount determination instructions that allow processors to execute operations within a single instruction, rounding floating-point numbers to a specified number of fraction bits and calculating the round-off amount, thereby simplifying the process and reducing errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If complex operations are used to round floating-point numbers to integers and back, then floating-point numbers can be processed, but processing efficiency deteriorates and operation complexity increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidoperation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the floating-point number into its component fields (sign bit, exponent, significand) and processes each segment separately. The rounding operation is further segmented into determining the round-off amount and applying the rounding mode, allowing efficient handling of each part independently rather than treating the floating-point number as a monolithic complex structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a round-off amount determination mechanism as an intermediary step between the original floating-point number and the rounded result. This intermediary calculates the exact amount of round-off based on the rounding mode and significant bits, enabling precise control of the rounding process without requiring complex multi-step operations

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If complex operations are used to round floating-point numbers, then rounding can be performed, but the number of instructions increases

Engineering Contradiction:
Improverounding operation simplicityVSAvoidinstruction execution time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent merges multiple operations into a single integrated instruction: extracting significant bits, determining the round-off amount based on the rounding mode, and applying the rounding operation. This consolidation allows the entire rounding process to be completed in one instruction cycle rather than requiring multiple separate instructions

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary extraction of the significant bits and determination of the round-off amount as preparatory steps within the single instruction. By pre-calculating the round-off amount before applying the rounding mode, the instruction avoids requiring additional follow-up operations to complete the rounding process

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10073695B2Floating point round-off amount determination processors, methods, systems, and instructions
Publication Date: 2018.09.11 INTEL CORP
  • US10073695B2 patent drawing
  • US10073695B2 patent drawing
  • US10073695B2 patent drawing

AI summary

A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point, and indicates a destination storage location. A result including one or more result floating point data elements is stored in the destination storage location in response to the floating point round-off amount determination instruction. Each of the one or more result floating point data elements includes a difference between a corresponding floating point data element of the source in a corresponding position, and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. Other methods, apparatus, systems, and instructions are disclosed.