Floating-Point Sign Injection for NaN-Boxed Format Conversion
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Solution Overview
Problem
Sign injection operations on NaN-boxed normalized values in floating point number formats can result in incorrect interpretation and denormalization failure due to the most-significant bit being flipped, leading to unintended NaN conversion.
Innovation Solution
Configure the denormalization logic to ignore the most-significant bit during de-normalization when detecting NaN-boxing, and perform bit manipulations at this bit position to maintain the correct NaN-boxing encoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If sign injection operation is performed on NaN-boxed normalized values, then the sign bit is flipped, but the most-significant bit being flipped causes incorrect interpretation and denormalization failure
Solution Approach 1:
The patent segments the bit manipulation process into two distinct phases: (1) performing the sign injection operation on the normalized representation, and (2) selectively ignoring the most-significant bit during denormalization. This segmentation allows the sign bit to be flipped correctly while preventing the flipped most-significant bit from causing denormalization failure, as the denormalization logic specifically excludes this bit from its detection criteria.
Solution Approach 2:
The patent applies local quality by making the denormalization logic selective about which bits to examine. Instead of treating all bits uniformly, the system specifically ignores the most-significant bit when detecting NaN-boxing conditions during denormalization. This localized exception allows the system to maintain correct behavior for sign injection operations while preserving proper denormalization functionality for other cases.
2Adaptability or versatility
If the most-significant bit is used for NaN-boxing encoding, then narrower format values can be represented in wider format registers, but flipping this bit during sign injection causes unintended NaN conversion
Solution Approach 1:
The patent applies preliminary action by performing the sign injection operation before the denormalization step. The sign bit is flipped in the normalized representation, and then during the subsequent denormalization phase, the system preliminarily identifies and excludes the most-significan bit from its NaN-boxing detection logic. This ensures that the flipped bit is recognized as an intentional sign change rather than an unintended NaN conversion indicator.
Solution Approach 2:
The patent inverts the conventional approach by making the denormalization logic explicitly exclude the most-significant bit from its examination criteria. Instead of treating the most-significant bit as a standard indicator for NaN-boxing, the system inverts the detection logic to ignore this bit, thereby allowing sign injection operations to proceed without causing unintended NaN conversions.
3Measurement precision
If normalized format is used for floating point operations, then precision and range are improved, but the complexity of handling different formats increases
Solution Approach 1:
The patent applies universality by designing the floating point unit to handle multiple formats (normalized and unnormalized) through a unified architecture. The normalization logic automatically converts values to the normalized format for internal operations, while the denormalization logic selectively converts back when needed. This multi-functional approach allows the system to maintain high precision benefits of normalized format while accommodating the versatility requirement of handling different formats without proportionally increasing complexity.
Data Source
AI summary
A processor can re-encode from an unnormalized wider floating point format to a normalized wider floating point format, and re-encode from an unnormalized narrower floating point format to a normalized narrower floating point format. According to the disclosure, when performing a wider-format sign injection operation on a NaN-boxed value of the normalized narrower floating point format held in a source register of a set of normalized-format registers, a bit manipulation is performed on a bit in the respective source register at a most-significant bit-position of the normalized wider floating point format. When de-normalizing the NaN-boxed value of the normalized narrower floating point format from the respective source register, the bit at the most-significant bit-position of the normalized wider floating point format is ignored in detecting NaN-boxing.