Floating Point Square Root Verification via LSB-MSB Magnitude Comparison
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Solution Overview
Problem
Current methods for verifying the correctness of floating point square root operations in processors do not effectively detect errors caused by circuit malfunctions, as they focus on internal operations rather than the final result, and existing techniques are not practical for real-time error detection without significant performance loss.
Innovation Solution
A method that compares the magnitude of the least significant bit (LSB) of the operand to the most significant bit (MSB) of the remainder to determine the correctness of the floating point square root result, allowing for efficient verification of the final result without verifying each mathematical step, thereby detecting errors due to hardware malfunctions or environmental disturbances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If formal verification techniques are used to verify internal mathematical operations of the square root algorithm, then design flaws can be eliminated, but circuit malfunctions during execution cannot be detected and the verification process is too complex for real-time use
Solution Approach 1:
The patent extracts only the essential verification elements (LSB of operand and MSB of remainder) from the complete formal verification process, separating the critical error-detection components from the full algorithm verification. This allows real-time error detection without requiring complex verification of all internal operations.
Solution Approach 2:
Instead of performing complete formal verification of all internal mathematical operations, the patent applies partial verification by checking only the relationship between the LSB of the operand and the MSB of the remainder. This partial action provides sufficient error detection capability while avoiding the complexity and performance overhead of full verification.
2Reliability
If complete formal verification of the square root algorithm is performed, then all design flaws can be detected, but processor performance is significantly reduced
Solution Approach 1:
The patent extracts only the essential verification elements (LSB of operand and MSB of remainder) from the complete formal verification process, separating the critical error-detection components from the full algorithm verification. This allows real-time error detection without requiring complex verification of all internal operations.
Solution Approach 2:
Instead of performing complete formal verification of all internal mathematical operations, the patent applies partial verification by checking only the relationship between the LSB of the operand and the MSB of the remainder. This partial action provides sufficient error detection capability while avoiding the complexity and performance overhead of full verification.
3Measurement precision
If parity and residue checks are used to verify internal operations, then correctness of each internal operation can be verified, but the correctness of the final square root result cannot be guaranteed
Solution Approach 1:
Instead of verifying internal operations forward through the algorithm steps, the patent inverts the approach by using the final remainder result to verify the correctness of the entire square root computation. The relationship between LSB of operand and MSB of remainder provides a backward verification that confirms final result correctness.
Solution Approach 2:
The patent implements feedback by using the remainder (output of the square root operation) to verify the correctness of the computation. The comparison between LSB of operand and MSB of remainder provides feedback that confirms whether the square root result is correct, creating a closed-loop verification system.
Data Source
AI summary
A method, system and computer program product for verifying a result of a floating point square root operation is provided. The method includes: receiving a result of a floating point square root operation for an operand; performing a comparison of a magnitude of a least significant bit (LSB) of the operand and a magnitude of a most significant bit (MSB) of a remainder; and determining whether the result is correct based on the comparison.