Correctly Rounded Floating Point Summation Circuit

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Solution Overview

Problem

Computer processing of floating point operations involving the addition of multiple inputs often results in unbounded errors due to round-off errors and cancellations, leading to inaccuracies in summation results.

Innovation Solution

A processing system and method for computing the sum of multiple floating point values that ensures correctly rounded outputs by employing a sequence of operations to maintain bounded relative error, specifically designed for summation of between 3 and 16 floating point values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple floating point values are summed together in a naïve fashion as a sequence of floating point additions that are individually rounded, then the processing operations are simple and fast, but the resulting sum has unbounded error

Engineering Contradiction:
Improveprocessing speedVSAvoidsummation accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent segments the summation process into multiple passes: first sorting inputs by exponent value, then performing additions in groups that maintain bounded error. This segmentation transforms a single unbounded-error operation into controlled segments where error can be managed and bounded throughout the computation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary sorting of floating point inputs by exponent value before performing additions. This preliminary arrangement ensures that additions are performed in an optimal order, preventing error accumulation and enabling correct rounding of the final result while maintaining processing efficiency.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If each individual sum is correctly rounded with small error as determined by floating point format, then the precision of each step is maintained, but the potential error in the resulting sum is not bounded when there is more than one addition

Engineering Contradiction:
Improveindividual sum precisionVSAvoidtotal summation reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements feedback mechanisms where each intermediate sum is correctly rounded according to floating point format, and this rounded result feeds into the next addition operation. This feedback loop ensures that error does not accumulate unboundedly across multiple operations, maintaining both individual precision and overall reliability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the parameter ordering of operations by sorting inputs based on exponent values before addition. This parameter reorganization ensures that additions proceed from smallest to largest magnitude, preventing catastrophic cancellation and bounding the error in the final result while maintaining individual sum precision.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If correct rounding is implemented for multiple floating point additions, then the summation accuracy is improved, but additional processing costs are required

Engineering Contradiction:
Improvesummation accuracyVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary sorting of inputs by exponent value, which enables subsequent additions to be performed in an order that guarantees correct rounding. This preliminary organization simplifies the overall process by eliminating the need for complex error analysis during each addition step, reducing processing complexity while maintaining high accuracy.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240160405A1Computation of correctly rounded floating point summation
Publication Date: 2024.05.16 INTEL CORP
  • US20240160405A1 patent drawing
  • US20240160405A1 patent drawing
  • US20240160405A1 patent drawing

AI summary

Computer computation of correctly rounded floating point summation is described. An example of apparatus includes a first circuit to sort multiple floating point (FP) values based on an exponent of each FP value and store the sorted FP values in a buffer, and to provide the plurality of FP values for summation sequentially in a sorted order starting with a FP value having a smallest exponent; a second circuit to iteratively sum the FP values and store an accumulated value, generate and store a residual value representing fully resolved bits from the accumulator, and generate an intermediate output including the residual value; and a third circuit to perform final rounding of the output, the final rounded output being a correctly rounded summation of the maximum floating point values.