Floating Semiconductor Die via Segmented Adhesive Regions
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Solution Overview
Problem
Conventional semiconductor devices and manufacturing methods result in low sensitivity, high costs, decreased reliability, and large package sizes, failing to effectively integrate electronic circuits and mechanical components in a compact and efficient manner.
Innovation Solution
A semiconductor package design featuring a first semiconductor die with spaced-apart adhesive regions, a second semiconductor die adhered to these regions, and a case covering the assembly, which includes conductive adhesive layers and wires to enhance electrical connectivity and mechanical support, allowing the second semiconductor die to float and improve sensitivity while minimizing package thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional semiconductor devices are used, then manufacturing is simpler, but sensitivity is too low
Solution Approach 1:
The patent divides the adhesive bonding structure into multiple discrete adhesive regions instead of a continuous adhesive layer. This segmentation allows the second semiconductor die to float above the first die at non-adhesive areas, creating air gaps that enhance sensitivity while maintaining structural integrity through strategically placed adhesive bonds.
Solution Approach 2:
The patent applies adhesive material only in specific localized regions rather than uniformly across the entire bonding interface. This local quality approach creates zones of adhesion and zones of separation, enabling the second die to float in certain areas for enhanced sensitivity while maintaining mechanical support in other areas.
2Adaptability or versatility
If conventional semiconductor devices are used, then package size is larger, but integration of electronic circuits and mechanical components is less efficient
Solution Approach 1:
The patent merges electronic circuits (semiconductor dies) with mechanical components (adhesive regions creating floating structure) into a single integrated package. The adhesive regions serve dual functions: providing mechanical bonding support and creating floating zones for enhanced sensitivity, thereby combining structural and functional elements efficiently.
Solution Approach 2:
The patent implements a nested structure where the second semiconductor die is positioned within the package structure formed by the first die and adhesive regions. The floating second die is nested within the package cavity, allowing efficient use of vertical space and compact integration of multiple functional layers.
3Reliability
If conventional semiconductor devices are used, then cost is lower, but reliability is decreased
Solution Approach 1:
The patent performs preliminary patterning of adhesive regions on the first semiconductor die before bonding the second die. This preliminary action ensures precise placement of adhesive material in predetermined locations, enabling controlled floating structures that enhance reliability while maintaining manufacturability through standard photolithography and dispensing processes.
Data Source
AI summary
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.


