Down-Sampled Floating-Tap DFE for Low-Power ISI Cancellation

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Solution Overview

Problem

In data communication applications, existing equalization techniques face challenges in effectively mitigating frequency-dependent signal degradation and inter-symbol interference (ISI) in serial communication channels, particularly due to unknown and time-varying channel characteristics, which affects communication quality and increases complexity and power consumption.

Innovation Solution

The implementation of a Decision Feedback Equalizer (DFE) with a combination of fixed-tap and floating-tap groups, utilizing down-sampling techniques such as phase pruning and phase amalgamation to constrain floating-tap positions, reduces power consumption and circuit complexity while efficiently canceling post-cursor ISI terms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of DFE filter taps is increased to cancel more ISI terms, then the ISI cancellation performance is improved, but the DFE filter length complexity and power consumption increase

Engineering Contradiction:
ImproveISI cancellation performanceVSAvoidDFE filter length complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the DFE filter into fixed-tap group and floating-tap group, where fixed-tap group handles early ISI terms and floating-tap group handles post-cursor ISI terms. This segmentation allows selective optimization of different tap groups, reducing overall complexity while maintaining ISI cancellation performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements floating-tap positions that can dynamically adjust their locations based on channel characteristics, rather than using a fixed number of taps. This dynamic approach allows the filter to adapt to varying channel conditions, effectively canceling ISI with fewer taps on average.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the number of DFE filter taps is increased to cancel more ISI terms, then the ISI cancellation performance is improved, but the power consumption increases

Engineering Contradiction:
ImproveISI cancellation performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the DFE filter into fixed-tap group and floating-tap group, enabling independent optimization of power consumption for each group. Fixed-tap group uses simpler, lower-power structures while floating-tap group dynamically activates only necessary taps, reducing overall power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent discards unnecessary floating-tap positions that do not contribute significantly to ISI cancellation, and recovers power by not maintaining those tap structures. The floating-tap mechanism selectively activates only the most beneficial tap positions based on channel conditions.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If adaptive equalization is employed to mitigate time-varying channel characteristics, then the communication quality is improved, but the complexity and power consumption increase

Engineering Contradiction:
Improvecommunication qualityVSAvoidequalization complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements floating-tap positions that dynamically adjust based on channel characteristics, providing adaptive equalization without requiring complex reconfiguration. The floating-tap group can shift tap positions to track channel variations, maintaining communication quality with moderate complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent designs the floating-tap group to serve multiple functions: canceling post-cursor ISI, adapting to time-varying channels, and providing robustness against noise and jitter. This multi-functionality reduces the need for separate adaptive mechanisms, lowering overall complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8537885B2Low-power down-sampled floating tap decision feedback equalization
Publication Date: 2013.09.17 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8537885B2 patent drawing
  • US8537885B2 patent drawing
  • US8537885B2 patent drawing

AI summary

In described embodiments, a variety of down-sampling techniques are employed to generate a more constrained set of floating-tap positions when compared to floating-tap Decision Feedback Equalization (DFE) architectures that allow unconstrained 1T resolution or separated floating-tap positions. Down-sampling is employed to constrain the floating-tap positions rather than positions occurring with 1T resolution or spacing. Two broad down-sampling techniques, phase pruning and phase amalgamation, are applied to a variety of exemplary DFE implementations. Although the tap positions are more constrained, the architectures select floating-tap positions containing dominant reflection inter-symbol interference (ISI) terms.