Floating Through Vias for Plasma Charge-Up Protection

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Solution Overview

Problem

The destruction of through vias due to plasma charge-up during the formation of semiconductor chips leads to reliability issues and decreased manufacturing yield, particularly in semiconductor devices for artificial intelligence and data centers.

Innovation Solution

Intentionally providing through vias with a floating potential that are designed to undergo dielectric breakdown due to plasma charge-up, thereby protecting other connected vias from dielectric breakdown and short-circuit failures without increasing chip size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If through vias are formed on semiconductor chips for three-dimensional lamination, then productivity and data processing capability are improved, but destruction of through vias due to plasma charge-up occurs leading to decreased reliability

Engineering Contradiction:
Improvedata processing capabilityVSAvoidthrough via reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies the principle of converting harm into benefit by intentionally introducing floating vias that are designed to undergo dielectric breakdown due to plasma charge-up. These floating vias act as sacrificial elements that absorb the harmful plasma charge-up effects, thereby protecting the functional through vias from destruction. The harmful plasma charge-up is thus converted into a protective mechanism where the floating vias sacrifice themselves to preserve the reliability of the semiconductor device.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent employs floating vias as intermediary elements between the plasma charge-up phenomenon and the functional through vias. These floating vias serve as a mediator that intercepts and absorbs the harmful effects of plasma charge-up, preventing direct damage to the connected through vias. The floating vias act as a buffer zone that protects the critical functional elements from the adverse plasma environment during manufacturing processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If protection circuits are added to prevent through via destruction, then reliability is improved, but device complexity and chip size increase

Engineering Contradiction:
Improvethrough via reliabilityVSAvoidchip structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements the self-service principle by designing floating vias that automatically perform the protection function without requiring external control or additional complex protection circuits. The floating vias inherently possess the property to absorb plasma charge-up effects and protect functional through vias through their own structural characteristics. This self-service mechanism eliminates the need for complex active protection systems, reducing device complexity while maintaining reliability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent applies the principle of using disposable elements by employing floating vias that are intentionally designed to be sacrificial. These floating vias are expected to undergo dielectric breakdown and become non-functional during plasma processing, but in doing so, they protect the more valuable functional through vias. The floating vias serve as cheap, replaceable protection elements that absorb damage rather than requiring complex, expensive protection circuits.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of semiconductor devices by preventing short-circuit failures and maintaining manufacturing yield while avoiding the need for additional protection circuits, thus improving overall device performance.

Implementation Method 1

destruction of the through via due to plasma charge-up has become apparent as a problem

Methodology Applied
Scientific EffectPlasma charge-up: Plasma

Implementation Method 2

designed to undergo dielectric breakdown due to plasma charge-up, thereby protecting other connected vias from dielectric breakdown and short-circuit failures

Methodology Applied
Scientific EffectDielectric breakdown:

Data Source

PatentEP3968370B1Semiconductor device
Publication Date: 2025.11.26 RENESAS ELECTRONICS CORP
  • EP3968370B1 patent drawingFigure 1~2
  • EP3968370B1 patent drawingFigure 3
  • EP3968370B1 patent drawingFigure 4A~4B

AI summary

A part among a plurality of through vias formed in a non-transistor region is a floating via having a floating potential.