Floating Wells in Trench Isolated ICs for Bandwidth Enhancement

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Solution Overview

Problem

In modern trench isolated integrated circuit processes, the large sidewall capacitance due to the lack of handle resistance in series with lateral sidewall resistance significantly degrades bandwidth and circuit performance, particularly in multi-transistor series attenuators.

Innovation Solution

The introduction of floating wells formed using additional trenches surrounding active device regions reduces sidewall or lateral capacitance by isolating sidewall capacitance from the isolation well, thereby improving circuit bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional trench isolation structures are used, then device electrical isolation is achieved, but large sidewall capacitance degrades bandwidth and circuit performance

Engineering Contradiction:
Improveelectrical isolationVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The isolation structure is segmented into multiple components: the original trench isolation, additional floating wells, and auxiliary trenches. This segmentation allows the sidewall capacitance to be divided into multiple smaller capacitances that are distributed throughout the structure, reducing the total effective capacitance and improving bandwidth while maintaining electrical isolation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Floating wells are introduced as intermediary elements between the active device regions and the isolation well. These floating wells act as mediators that reduce the direct capacitive coupling between adjacent devices, thereby reducing sidewall capacitance and improving circuit bandwidth without compromising the electrical isolation function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If additional trenches and floating wells are introduced to reduce sidewall capacitance, then bandwidth is enhanced, but device complexity increases

Engineering Contradiction:
ImprovebandwidthVSAvoidisolation structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The floating wells serve multiple functions simultaneously: they reduce sidewall capacitance to improve bandwidth, maintain electrical isolation between devices, and provide a standardized structural element that can be replicated across different circuit designs. This multi-functionality justifies the additional complexity by delivering multiple benefits from a single structural addition.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention changes the electrical parameters of the isolation structure by introducing floating wells with specific capacitance characteristics. By carefully controlling the depth, width, and positioning of these floating wells, the sidewall capacitance is optimized to achieve the desired bandwidth improvement while managing the overall device complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of floating wells in trench isolated integrated circuits effectively reduces parasitic capacitance and displacement currents, enhancing bandwidth by isolating sidewall capacitance from AC ground and reducing net capacitance, leading to improved circuit performance.

Implementation Method 1

the large sidewall capacitance due to the lateral resistance between devices significantly degrades the bandwidth and circuit performance

Methodology Applied
Scientific EffectParasitic Capacitance: Parasitic Capacitance

Data Source

PatentUS9685932B2Apparatus and methods for enhancing bandwidth in trench isolated integrated circuits
Publication Date: 2017.06.20 ANALOG DEVICES INC
  • US9685932B2 patent drawing
  • US9685932B2 patent drawing
  • US9685932B2 patent drawing

AI summary

Provided herein are apparatus and methods for enhancing bandwidth in trench isolated integrated circuits. In certain configurations, an auxiliary trench forming floating regions between moat isolation regions can isolate parasitic sidewall capacitances of active device regions from ground or AC ground. In this manner the active device regions are merged by the auxiliary trench so as to improve circuit bandwidth and enhance circuit performance. When arranged or combined within a circuit branch, transistors within each floating moat can operate with relatively small parasitic displacement current and can have improved performance.