Global Floorplanning via Semidefinite Programming

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Solution Overview

Problem

Existing global floorplanning methods for VLSI design face challenges such as non-convex problem formulations, trivial global solutions, and difficulty in handling constraints like Pre-Placed Modules, leading to suboptimal wirelength and area allocation.

Innovation Solution

A framework that models the global floorplanning problem as a semi-definite programming (SDP) problem with a rank constraint, replaced by an inner product between the target matrix and a direction matrix, using a convex iteration algorithm to decompose the problem into two SDP sub-problems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-convex optimization methods are used to model floorplanning, then the problem formulation captures the complexity of module placement, but the solution gets trapped in local optima and cannot guarantee global optimality

Engineering Contradiction:
Improvesolution qualityVSAvoidoptimization complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transforms the non-convex floorplanning problem into a convex semi-definite programming problem by changing the mathematical parameters and formulation. Specifically, it uses matrix variables and semi-definite constraints to represent module positions and dimensions, converting the original non-convex optimization into a convex one that guarantees global optimality while maintaining problem fidelity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediate matrix variable G (Gram matrix) as a mediator between the module placement problem and the optimization objective. This intermediate representation allows the transformation of position coordinates into matrix form, enabling the use of convex SDP techniques while preserving the geometric relationships between modules

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If packing-based representations are used to represent module locations, then the problem becomes more structured, but accuracy is lost and evaluation overhead increases

Engineering Contradiction:
Improveproblem structureVSAvoidwirelength calculation accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent transitions from representing module positions in traditional 2D coordinate space to a higher-dimensional matrix space using Gram matrices. This dimensional transformation allows the preservation of geometric relationships while enabling convex optimization, effectively moving the problem from a constrained 2D representation to a more flexible matrix representation that maintains accuracy

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If the problem size is reduced to less than 100 IP-cores for manual floorplanning, then the problem becomes manageable for experts, but the design cycle time remains insufficient

Engineering Contradiction:
Improvemanual planning manageabilityVSAvoiddesign cycle speed
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent creates an automated floorplanning system that performs the task independently without requiring expert manual intervention. The convex SDP formulation with its guaranteed global optimality and efficient solution algorithms enables the system to handle large-scale designs automatically, eliminating the time constraints that limit manual expert work while maintaining or improving solution quality

Inventive Principle:
Principle #25Self-service

4Loss of energy

If analytical-based methods minimize wirelength by optimizing an objective function, then wirelength reduction is achieved, but trivial global solutions occur where all modules are placed in the same location

Engineering Contradiction:
ImprovewirelengthVSAvoidsolution validity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent introduces counterbalancing constraints that prevent modules from collapsing to the same location. Specifically, it uses trace constraints and determinant constraints on the Gram matrix to ensure that module positions are properly distributed in space, counteracting the tendency of the wirelength minimization objective to push all modules to a single point

Inventive Principle:
Principle #8Anti-weight (Counterweight)

Data Source

PatentUS20250117562A1System and method for global floorplanning via semidefinite programming
Publication Date: 2025.04.10 CARNEGIE MELLON UNIV
  • US20250117562A1 patent drawing
  • US20250117562A1 patent drawing
  • US20250117562A1 patent drawing

AI summary

Disclosed herein is a framework for modeling the global floorplanning problem as a semi-definite programming (SDP) problem with an inner product between the target matrix and a direction matrix replacing the rank constraint. The framework is global optimal if an appropriate direction matrix is chosen, which is calculated using a convex iteration algorithm that decomposes the problem into two SDP sub-problems.