Flow Assignment to Multi-Core Threads for Network Packet Processing
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Solution Overview
Problem
The current TCP implementations experience performance bottlenecks due to memory access delays and contention across multiple processing cores when accessing and updating state data for each connection, leading to slowed system performance and latency issues.
Innovation Solution
A scheme is implemented where packet flows are assigned to specific threads executing on cores, allowing packets belonging to the same flow to be processed by the same core, reducing contention and latency by storing flow state data in local core memory instead of external memory, and using global and local classify logic to manage flow assignments and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If TCP state data is stored in external memory and accessed by multiple processing cores, then system capacity and connection handling capability are improved, but memory access delays and contention increase causing performance bottlenecks
Solution Approach 1:
The patent divides the monolithic TCP processing system into multiple independent processing cores, each capable of handling TCP connections autonomously. By segmenting the state data storage into distributed caches across multiple cores rather than a single centralized memory, the system achieves parallel processing while reducing memory access contention and delays for each individual core.
Solution Approach 2:
The patent introduces a new dimensional approach by implementing a hierarchical memory architecture that adds intermediate caching layers between the CPU cores and external memory. This dimensional change creates multiple levels of data access (register cache, core cache, external memory), allowing frequent TCP state accesses to be served from faster intermediate storage while maintaining the capacity benefits of external memory.
2Productivity
If multiple processing cores share access to TCP state data, then processing throughput is improved, but contention and locking latency increase
Solution Approach 1:
The patent segments the TCP state data management into independent zones for each processing core, with each core maintaining its own cache and state information. This segmentation eliminates the need for extensive locking mechanisms when cores access their own cached data, allowing parallel processing without contention while still enabling throughput scaling through multiple cores.
Solution Approach 2:
The patent implements local quality by giving each processing core its own dedicated cache memory and state storage resources. Instead of all cores sharing identical memory resources, each core has optimized local access to its frequently accessed TCP state data, reducing the need for inter-core synchronization and locking operations.
3Quantity of substance
If flow state data is stored in external memory, then system capacity is improved, but access speed and processing efficiency decrease
Solution Approach 1:
The patent segments the memory hierarchy into multiple levels: fast local caches attached to each processing core for immediate access, and larger external memory for capacity. This segmentation allows the system to maintain high access speeds for active flow state data in local caches while preserving large system capacity in external memory for storing less frequently accessed data.
Solution Approach 2:
The patent adds a temporal dimension to memory access by implementing a time-based caching strategy where recently accessed flow state data is kept in fast local memory, while less recently accessed data is moved to external storage. This dimensional approach separates data based on access frequency and recency, optimizing both speed and capacity simultaneously.
Data Source
AI summary
In general, in one aspect, the disclosure describes assigning a flow of network packets to a thread of a multi-threaded processor core in a set of multiple multi-threaded processor cores integrated on a single die. Based on the assigning, a packet in the flow is processed by the assigned processor core thread.