Flowable Oxide Layer for Low-Temperature SOI Bonding
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Solution Overview
Problem
Current methods for preparing semiconductor-on-insulator (SOI) structures face challenges such as impurity influence from handle substrates, costly processes, and non-uniformity in layer thickness and flatness, particularly in multilayer structures, which affect the reliability and cost-effectiveness of the semiconductor devices.
Innovation Solution
A method involving the deposition of a reflowable insulating layer comprising silicate glass on a semiconductor handle substrate, followed by curing and bonding with a donor dielectric layer, utilizing ozone, ultraviolet irradiation, or annealing, to form a bonded structure that resists impurities and improves bond strength and uniformity, incorporating additional insulating layers like oxide-nitride-oxide (ONO) for enhanced reliability and reduced voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If traditional thermal annealing at high temperatures is used to strengthen wafer bonds, then bond strength is improved, but impurity influence from handle substrates increases and manufacturing precision deteriorates
Solution Approach 1:
The patent changes the temperature parameter from traditional high-temperature annealing (800-1100°C) to low-temperature processing (room temperature to 200°C). This parameter change allows bond strengthening through alternative mechanisms (van der Waals forces, hydrogen bonding) while avoiding thermal activation of impurities and defects in the handle substrate, thereby resolving the contradiction between bond strength and impurity influence
Solution Approach 2:
The patent utilizes phase transition of water to ice during freeze bonding, where liquid water at the wafer interface transforms to solid ice, creating strong mechanical and molecular bonds between wafers at low temperatures. This phase transition mechanism enables bond strengthening without high-temperature thermal processes that would activate impurities
2Reliability
If conventional wafer bonding methods are used, then bonding is achieved, but manufacturing precision and layer thickness uniformity deteriorate
Solution Approach 1:
The patent applies preliminary surface activation treatments (plasma treatment, chemical etching, or surface roughening) to wafer surfaces before bonding to ensure optimal bonding conditions. This preliminary action creates uniform surface energy distribution and removes contaminants, enabling uniform van der Waals bonding across the entire wafer surface, which resolves the contradiction between bonding reliability and thickness uniformity
Solution Approach 2:
The patent replaces traditional mechanical bonding methods (pressure bonding, thermal compression) with molecular-level bonding mechanisms (van der Waals forces, hydrogen bonding). This substitution allows bonding to occur at low pressures and temperatures while maintaining atomic-level surface contact uniformity, thereby achieving both reliable bonding and precise thickness control
3Strength
If high temperature annealing is used to strengthen bonds, then bond strength improves, but process cost and energy consumption increase
Solution Approach 1:
The patent fundamentally changes the temperature parameter from high (800-1100°C) to low (room temperature to 200°C), reducing thermal energy consumption by more than 90%. The bond strengthening is achieved through prolonged exposure to low-temperature molecular forces rather than high-temperature thermal activation, resolving the contradiction between bond strength and energy consumption
Solution Approach 2:
The patent employs continuous low-temperature bonding processes where wafers are held in intimate contact under mild pressure for extended periods (minutes to hours), allowing van der Waals forces to continuously act and strengthen bonds gradually. This continuous low-energy process replaces discontinuous high-energy thermal annealing cycles, achieving bond strength through persistent molecular attraction rather than transient thermal spikes
4Reliability
If traditional thermal processes are used for layer transfer, then bonding is achieved, but manufacturing complexity and process time increase
Solution Approach 1:
The patent changes multiple process parameters simultaneously: temperature (down to room temperature), pressure (reduced to atmospheric or mild vacuum), and time (optimized to minutes). This parameter optimization enables layer transfer without prolonged high-temperature annealing, reducing process time while maintaining reliability through low-temperature molecular bonding mechanisms
Solution Approach 2:
The patent segments the layer transfer process into distinct stages: surface preparation (plasma/chemical treatment), intimate contact bonding (van der Waals/H-bonding at low temperature), and optional mild annealing (room temperature to 200°C). This segmentation allows each stage to be optimized independently, reducing total process time while ensuring reliable bonding through cumulative effect of multiple controlled steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and reduces costs by mitigating impurity influence, improving bond strength, and achieving better uniformity in multilayer SOI structures, leading to more reliable and cost-effective semiconductor devices.
Implementation Method 1
a reflowable insulating layer capable of flowing at an elevated temperature
Implementation Method 2
contacting the reflowable insulating layer with ozone
Implementation Method 3
irradiating the reflowable insulating layer with ultraviolet light
Implementation Method 4
annealing the reflowable insulating layer at a temperature between about 800°C and about 1000°C
Implementation Method 5
bonding a donor dielectric layer on a front surface of a single crystal semiconductor donor substrate to the handle dielectric layer comprising the reflowable insulating layer to thereby form a bonded structure that resists impurities
Data Source
Figure 1A~1B
Figure 1C~2
Figure 3
AI summary
A method is provided for preparing a semiconductor-on-insulator structure comprising a flowable insulating layer or a reflowable insulating layer.