Power Semiconductor Module Fluid Channel With Aligned Cooling Elements

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Solution Overview

Problem

Power semiconductor modules face inefficiencies in cooling due to turbulence in fluid flow caused by cooling elements, leading to pressure drops and localized thermal hotspots, as existing cooling schemes do not uniformly dissipate heat across the die carrier surface.

Innovation Solution

A fluid channel design for power semiconductor modules featuring a die carrier with cooling elements arranged in a cavity, where a majority of attachment points are vertically aligned with semiconductor dies, and a higher density of cooling elements in the center region with varying arc heights to optimize fluid flow velocity and heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If cooling elements are added to enhance heat dissipation, then cooling efficiency is improved, but turbulence in fluid flow increases causing pressure drop

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidpressure drop
Core Design Contradiction:
TemperatureVSStress or pressure

Solution Approach 1:

The patent applies local quality by positioning cooling elements specifically at locations corresponding to semiconductor dies on the die carrier. The cooling elements are arranged non-uniformly, with higher density in regions where heat generation occurs, rather than distributing them evenly throughout the fluid channel. This localized arrangement ensures efficient heat dissipation from hot spots while minimizing unnecessary cooling elements that would create turbulence and pressure drop in regions without heat sources.

Inventive Principle:
Principle #3Local quality

2Reliability

If cooling elements are arranged to cover the entire surface, then uniform cooling is improved, but fluid flow turbulence increases

Engineering Contradiction:
Improveuniform cooling distributionVSAvoidfluid flow turbulence
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements local quality by creating non-uniform distributions of both cooling elements and fluid flow velocity. The cooling elements are concentrated in specific regions corresponding to heat-generating components, while the fluid channel geometry creates higher flow velocity in fringe regions. This localized differentiation achieves uniform cooling across the die carrier surface without requiring complete coverage by cooling elements, thereby reducing overall turbulence.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies dynamics by creating a height profile in the fluid channel that varies the flow velocity dynamically across different regions. The channel height is smaller in fringe regions to increase fluid velocity and enhance convective heat transfer, while the center region has greater height allowing lower velocity. This dynamic velocity distribution adapts to the local cooling requirements, maintaining uniform cooling while managing turbulence.

Inventive Principle:
Principle #15Dynamics

3Temperature

If cooling elements are positioned to align with semiconductor dies, then heat dissipation from dies is improved, but cooling uniformity across the surface may be compromised

Engineering Contradiction:
Improveheat dissipation from semiconductor diesVSAvoidcooling uniformity
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent resolves this contradiction by implementing local quality through differentiated regions. Cooling elements are positioned with high density in the center region directly beneath semiconductor dies to maximize heat dissipation from heat-generating components. Simultaneously, the fluid channel geometry provides higher flow velocity in fringe regions to compensate for the lower density of cooling elements, ensuring these regions also achieve adequate cooling. This localized differentiation maintains both targeted die cooling and overall surface uniformity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies asymmetry by creating an asymmetric arrangement where cooling element density and fluid flow velocity are intentionally mismatched across the die carrier surface. The center region has high cooling element density with lower fluid velocity, while fringe regions have lower cooling element density with higher fluid velocity. This asymmetric configuration balances the thermal loads across different regions, achieving uniform cooling despite the non-uniform distribution of cooling elements.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances heat dissipation by aligning cooling elements with semiconductor dies, reducing pressure drops and thermal hotspots, while optimizing fluid flow velocity to improve cooling efficiency across the module.

Implementation Method 1

one side of a die carrier (carrying the power semiconductor dies on an opposite side) is in direct contact with a cooling fluid flowing through a fluid channel

Methodology Applied
Scientific EffectHeat transfer: Conduction (thermal)

Implementation Method 2

cooling fluid flowing through a fluid channel

Methodology Applied
Scientific EffectConvection: Convection

Data Source

PatentUS11410909B2Fluid channel, power semiconductor module and method for fabricating a power semiconductor module
Publication Date: 2022.08.09 INFINEON TECHNOLOGIES AG
  • US11410909B2 patent drawing
  • US11410909B2 patent drawing
  • US11410909B2 patent drawing

AI summary

A fluid channel for a power semiconductor module includes a die carrier configured to carry a plurality of semiconductor dies on a first side, a plurality of cooling elements arranged on a second side of the die carrier opposite the first side, and a channel wall arranged opposite the second side of the die carrier and forming a cavity. The cooling elements are arranged in the cavity. The cooling elements are attached to the die carrier at attachment points. A majority of the attachment points are positioned vertically in alignment with positions of the semiconductor dies.