Fluorinated Gate Stack Tuning for p-FinFET Threshold Control
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Solution Overview
Problem
The challenge of tuning the threshold voltage in transistors, particularly p-type finFETs, is exacerbated by scaling constraints that limit the thickness of work function layers, leading to poor gap-fill and unpredictable voltage variations due to reduced spacing between transistors.
Innovation Solution
A method involving fluorination operations on gate stack layers, including the gate dielectric, barrier layer, and work function layers, using fluorine-based gases at controlled temperatures, with optional annealing and sacrificial blocking layers to modulate fluorine distribution and prevent diffusion, thereby adjusting the threshold voltage and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the thickness of work function layers is increased to tune threshold voltage, then threshold voltage control is improved, but device spacing requirements increase which conflicts with scaling constraints
Solution Approach 1:
The patent changes the chemical composition parameters of the gate dielectric layer by introducing fluorine through fluorination treatment. This modifies the electrical properties of the dielectric, enabling threshold voltage tuning without requiring thicker work function layers, thus resolving the conflict between threshold voltage control and device spacing requirements
Solution Approach 2:
The patent introduces fluorine as an intermediary element that mediates between the gate dielectric and the work function layer. The fluorinated gate dielectric acts as an intermediate layer that provides the necessary electrical field control, allowing thinner work function layers to achieve the same threshold voltage tuning effect
2Manufacturing precision
If high-energy processing is used to modify gate stack layers, then material properties can be changed, but damage to the gate stack may occur
Solution Approach 1:
The patent replaces high-energy physical processing methods with low-energy chemical fluorination treatment. Instead of using ion implantation or plasma damage mechanisms, the patent uses controlled chemical reactions to introduce fluorine into the gate dielectric, achieving material property modification without causing structural damage
Solution Approach 2:
The patent changes the processing energy parameters from high-energy to low-energy regime. The fluorination process is conducted at controlled temperatures and pressures that modify dielectric properties through chemical means rather than physical damage, preserving gate stack integrity while achieving the desired electrical characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively lowers the threshold voltage of p-type transistors while enhancing the reliability of the gate dielectric stack by passivating oxygen vacancies and reducing trap centers, without causing damage from high-energy processing.
Implementation Method 1
modifying the gate dielectric layer with fluorine
Implementation Method 2
passivating oxygen vacancies and reducing trap centers
Implementation Method 3
heating at controlled temperatures
Implementation Method 4
optional annealing and sacrificial blocking layers to modulate fluorine distribution
Data Source
AI summary
The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.


