Flush Packet Broadcasting for Parallel Cache Line Invalidation
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Solution Overview
Problem
Current methods for flushing cache lines in level 3 caches are inefficient, requiring serial processing and consuming excessive processor resources, while also risking performance interference with other processes by flushing data used by other cores or devices.
Innovation Solution
A method where a processor sends a single flush packet to flush multiple cache lines in parallel, reducing the number of packet transmissions and transforming serial flush tasks into parallel processing, thereby improving efficiency and reducing resource usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor core sends one flush packet to flush one cache line each time, then the flushing operation is simple and straightforward, but the flushing efficiency is low and processor resources are excessively consumed
Solution Approach 1:
The patent combines multiple cache line flush operations into a single flush packet. Instead of sending one flush packet per cache line, the system now sends one flush packet that contains a list of multiple cache line addresses to be flushed simultaneously. This merging of operations transforms serial processing into parallel processing, significantly improving flushing efficiency and reducing the time lost to flush operations.
2Reliability
If the processor core flushes cache lines in all level 3 caches simultaneously, then the flushing operation is completed comprehensively, but data used by other processor cores may be flushed causing performance degradation
Solution Approach 1:
The patent implements selective flushing by allowing the flush packet to specify particular cache lines that need to be flushed, rather than flushing all cache lines in level 3 caches. The flush packet contains a list of specific cache line addresses, enabling the system to flush only the necessary local regions while leaving other cache lines intact. This local quality approach ensures flushing accuracy for the required data while preserving performance of other processes that may be using different cache lines.
Data Source
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AI summary
This application discloses a flush packet sending method and apparatus, and relates to the computer field, to resolve a problem of how a computer system efficiently flushes cache lines in a level 3 cache and reduces occupied internal resources of a processor. The method includes: A request device sends a flush packet to a set of caches in a broadcast manner, and receives flush completion packets from all caches in the set of caches. Physical address information carried in the flush packet is used to indicate to flush at least two cache lines. After receiving the flush packet from the request device, a cache flushes a cache line that is in the at least two cache lines indicated by the flush packet and that is within a management scope of the cache, and sends a flush completion packet to the request device. The set of caches includes at least one cache.