Asymmetric Half-Bridge Flyback Control for Adaptive Dead Time

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Solution Overview

Problem

Existing asymmetric half-bridge flyback converters face challenges in achieving optimal zero-voltage switching due to non-adaptive delay time settings and suboptimal dead time adjustments, which are complicated and not ideal for a wide range of input and output voltages.

Innovation Solution

A control method for the asymmetric half-bridge flyback converter that adjusts the pre-turnoff time of the second switch transistor based on real-time feedback, such as current and voltage integration, and dynamically adjusts the dead time to ensure zero-voltage switching, using a self-adaptive approach to optimize switching performance across varying conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If fixed delay time is used for pre-turnoff of second switch transistor, then control is simple, but zero-voltage switching cannot be achieved under varying voltage conditions

Engineering Contradiction:
Improvecontrol simplicityVSAvoidadaptability to voltage variations
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic adjustment of the pre-turnoff delay time based on real-time detection of voltage conditions. The controller modifies the delay parameter adaptively according to input voltage variations, ensuring zero-voltage switching is maintained across different operating conditions rather than using a fixed delay value.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms where the controller detects voltage conditions and uses this information to adjust the pre-turnoff delay time. This closed-loop control ensures that the delay is optimized for current operating conditions, resolving the contradiction between simple fixed control and adaptive performance.

Inventive Principle:
Principle #23Feedback

2Device complexity

If dead time is not optimized, then circuit structure remains simple, but switching performance and efficiency are suboptimal

Engineering Contradiction:
Improvecircuit structure complexityVSAvoidswitching efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent optimizes the dead time parameter to specific values that enable zero-voltage switching. By carefully selecting and adjusting the dead time duration, the system achieves improved switching efficiency and reduced losses without requiring fundamental changes to the circuit topology or additional complex control mechanisms.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If non-adaptive delay time is used, then control implementation is simple, but optimal zero-voltage switching cannot be achieved across wide voltage range

Engineering Contradiction:
Improvecontrol implementation simplicityVSAvoidzero-voltage switching reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The control system dynamically adjusts the pre-turnoff delay time based on detected voltage conditions. This dynamic adaptation ensures that zero-voltage switching is reliably achieved across the full operating voltage range, preventing shoot-through conditions and improving overall system reliability while maintaining practical implementation complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12057777B2Asymmetric half-bridge flyback converter and control method thereof
Publication Date: 2024.08.06 JOULWATT TECH INC LTD
  • US12057777B2 patent drawing
  • US12057777B2 patent drawing
  • US12057777B2 patent drawing

AI summary

Disclosed is an asymmetric half-bridge flyback converter and a control method, including: in an initial switching cycle of the asymmetric half-bridge flyback converter, obtaining a pre-turnoff time of the second switch transistor, and controlling the second switch transistor to be turned off after a delay which lasts for a first time and starts at the pre-turnoff time of the second switch transistor; in a non-initial switching cycle of the asymmetric half-bridge flyback converter, obtaining a judgment result by judging whether the first switch transistor is operated with zero-voltage switching in a current switching cycle, and adjusting a length of the first time based on the judgment result. The present disclosure can realize zero-voltage switching of the asymmetric half-bridge flyback converter, and at the same time, satisfy a requirement for achieving more ideal dead-time setting under a wider range of input voltage and a wider range of output voltage.