Flyback Converter Synchronous Rectifier Fault Detection

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Solution Overview

Problem

Conventional fault detection techniques for synchronous rectifier switch transistors in flyback converters cannot effectively detect partially-open fault conditions, leading to reliability issues due to thermal stress and inefficiencies.

Innovation Solution

A secondary-side controller with a gate driver, timer, and logic circuit that compares a detection period to threshold periods to detect partially-open and open fault conditions in synchronous rectifier switch transistors, allowing for improved fault detection during normal operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If synchronous rectifier switch transistor is used to improve efficiency, then efficiency is improved, but fault detection capability deteriorates

Engineering Contradiction:

ImproveefficiencyVSAvoidfault detection capability

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The patent applies preliminary action by detecting fault conditions during the dead-time period before the synchronous rectifier switch transistor is fully activated. The controller measures drain-to-source voltage during this preliminary detection window to identify open or partially-open faults before they cause thermal stress or efficiency degradation, thus resolving the contradiction between maintaining efficiency and enabling fault detection.

Inventive Principle:

Principle #10Preliminary action

2Device complexity

If conventional fault detection technique is used, then device complexity is reduced, but measurement precision deteriorates

Engineering Contradiction:

Improvedetection circuit complexityVSAvoidfault condition detection accuracy

Core Design Contradiction:

Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies partial action by implementing fault detection that operates during specific portions of the switching cycle (dead-time periods) rather than continuously. This partial detection approach maintains low device complexity while achieving sufficient measurement precision to distinguish between open faults, partially-open faults, and normal operation conditions.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the parameter being measured from gate-to-source capacitance (conventional method) to drain-to-source voltage during dead-time periods. This parameter change enables detection of partially-open fault conditions that were previously undetectable, improving measurement precision without significantly increasing device complexity.

Inventive Principle:

Principle #35Parameter changes

3Measurement precision

If drain-to-source voltage monitoring is implemented during dead-time, then fault detection precision is improved, but use of energy increases

Engineering Contradiction:

Improvefault detection precisionVSAvoidcontroller energy consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by performing drain-to-source voltage monitoring only during dead-time periods of the switching cycle rather than continuously. This periodic detection approach achieves high fault detection precision while minimizing energy consumption, as the monitoring is confined to brief intervals when the synchronous rectifier switch transistor is naturally transitioning states.

Inventive Principle:

Principle #19Periodic action

Data Source

PatentUS11394303B2Flyback converter with synchronous rectifier switch fault detection

Publication Date: 2022.07.19 DIALOG SEMICONDUCTOR INC

AI summary

A flyback converter is provided that compares a drain-to-source voltage of a synchronous rectifier switch transistor to a negative threshold voltage to detect whether the synchronous rectifier switch transistor has a partially-open or an open fault condition. The flyback converter also compares a gate terminal voltage of a gate driver to the synchronous rectifier switch transistor to a positive threshold voltage to detect whether the synchronous rectifier switch transistor has a gate open or a gate short-circuit fault condition.