Flyback Converter Negative Sense Detection via VBUS Tracking
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Solution Overview
Problem
AC-DC converters operating in Discontinuous Conduction Mode face false negative sense detection issues, leading to inefficiencies and potential component breakdown due to cross-conduction, which conventional blanking time solutions do not fully address.
Innovation Solution
A secondary side controller with a VBUS tracking reference scheme and dynamic VBUS current compensation is employed to accurately detect true negative sense events, distinguishing between real and false detections and optimizing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If blanking time is used to prevent false NSN detection, then reliability is improved, but productivity deteriorates due to unnecessary turn-on of secondary side
Solution Approach 1:
The patent changes the detection parameter from simple voltage threshold to a combination of voltage threshold and timing relationship. The secondary side controller detects NSN events by monitoring both the voltage level at the SR drain and the timing relative to the primary PS-FET switching cycle, allowing distinction between true and false NSN events without requiring blanking time that would reduce efficiency
2Reliability
If secondary side is turned on during primary on-cycle to prevent false NSN, then reliability is improved, but energy loss increases due to power transfer through rectifier diode
Solution Approach 1:
The patent implements feedback by having the secondary side controller monitor the SR drain voltage and the primary side switching status, then use this feedback information to make intelligent decisions about when to turn on the secondary PS-FET. The controller waits for confirmation that the primary side is truly off before activating the secondary side, preventing both false NSN detection and unnecessary diode conduction losses
Data Source
AI summary
A secondary side controller of a flyback AC-DC converter includes an integrated circuit, which includes: an analog-to-digital converter (ADC) coupled to a voltage bus (VBUS), the ADC to output a digital value corresponding to a voltage level of the VBUS; first logic configured to generate a reference voltage based on the digital value; second logic configured to generate a VBUS gain value based on output power of a flyback transformer of the flyback AC-DC converter; an integrator to accumulate current corresponding to a sensed voltage at a drain of a synchronous rectifier (SR) of a secondary side of the flyback transformer, the accumulated current to be modified according to the VBUS gain value, wherein the integrator outputs an updated sensed voltage; and a comparator to output a detection signal, indicative of a negative sense voltage, in response to the updated sensed voltage matching the reference voltage.