Flyback Secondary Controller for Accurate Peak-Valley Sensing
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Solution Overview
Problem
Existing AC-DC flyback converters for USB Type-C controllers face inefficiencies due to sinusoidal oscillations in the transformer secondary side, requiring precise control of primary and secondary power transistors to improve peak and valley detection for enhanced power delivery.
Innovation Solution
The implementation of a secondary side controller with a synchronous flyback architecture and calibration block to generate accurate power switch signals, utilizing a single SR-sense pin for improved peak and valley detection, thereby enhancing the efficiency of the AC-DC flyback converter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional peak and valley detection methods are used in flyback converters, then the control of primary and secondary power transistors can be implemented, but the detection accuracy is insufficient due to sinusoidal oscillations (ringing) in the secondary waveform
Solution Approach 1:
The patent extracts the harmful sinusoidal oscillations from the detection signal by using a dedicated sensing circuit that separates the oscillation component from the peak/valley detection signal. The sensing circuit is configured to detect only the envelope of the oscillating waveform, effectively removing the ringing interference that would otherwise degrade detection accuracy.
Solution Approach 2:
The patent introduces an intermediary sensing circuit between the secondary winding and the control logic. This intermediary circuit processes the raw oscillating signal through rectification and filtering stages, converting it into a clean detection signal that accurately represents the peak and valley points without the harmful oscillations.
2Loss of energy
If precision control of primary and secondary power transistors is implemented to improve efficiency, then power conversion efficiency increases, but the device complexity increases
Solution Approach 1:
The patent merges the peak detection, valley detection, and transistor control functions into a single integrated control circuit. By combining multiple functions into one unified circuit block, the patent achieves precision control of power transistors for improved efficiency while avoiding the complexity increase that would result from separate dedicated circuits for each function.
Solution Approach 2:
The control circuit is designed with multi-functionality, serving as both the peak detector, valley detector, and transistor controller simultaneously. This universal circuit performs multiple critical functions with a single integrated design, reducing overall device complexity while maintaining the precision control needed for high efficiency.
3Measurement precision
If multiple sensing pins are used for accurate peak and valley detection, then detection precision improves, but the device complexity and size increase
Solution Approach 1:
The patent segments the detection functions temporally rather than spatially. Instead of using multiple pins to detect peaks and valleys simultaneously, the single sensing pin sequentially detects different aspects of the waveform through time-multiplexed operation, achieving full detection capability with one pin.
Solution Approach 2:
The sensing circuit operates in periodic cycles, alternating between detecting peak values and valley values through the single sensing pin. This periodic action allows the circuit to extract both peak and valley information sequentially from the oscillating waveform, maintaining detection precision while using only one pin.
Data Source
AI summary
A secondary side controller for a flyback converter includes an integrated circuit (IC), which in turn includes: a synchronous rectifier (SR) sense pin coupled to a drain of an SR transistor on a secondary side of the flyback converter; a capacitor having a first side coupled to the SR sense pin, the capacitor to charge or discharge responsive to a voltage sensed at the SR sense pin; a diode-connected transistor coupled between a second side of the capacitor and ground; a first current mirror coupled to the diode-connected transistor and configured to receive, as input current, a reference current from a variable current source; and a peak detect transistor coupled to the diode-connected transistor and to an output of the first current mirror. The peak detect transistor is to output a peak detection signal in response to detecting current from the capacitor drop below the reference current.