Flyback Converter Synchronous Rectifier Gate Control

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Solution Overview

Problem

Flyback converters experience shoot-through due to mis-synchronization of the synchronous rectifier (SR) controller with the primary side, leading to high current and voltage saturation of the transformer, potentially damaging the converter.

Innovation Solution

The system temporarily disables and enables the driving of the gate of the secondary MOSFET by the SR controller to allow synchronization with the switching frequency on the primary side, using a pre-specified delay mechanism to prevent mis-synchronization, and activates/deactivates the SR controller based on output voltage and current thresholds to manage conduction modes and light-load conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the synchronous rectifier controller is activated during light-load conditions to reduce power losses, then power efficiency is improved, but mis-synchronization with the primary side may occur causing shoot-through

Engineering Contradiction:
Improvepower lossesVSAvoidshoot-through prevention
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies preliminary action by implementing a delay mechanism that temporarily disables the synchronous rectifier controller upon activation. This delay allows the controller to synchronize with the primary side switching frequency before becoming operational, preventing mis-synchronization and shoot-through events while still enabling power loss reduction during light-load conditions

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If the synchronous rectifier controller synchronizes with the ringing of the drain to source voltage, then synchronization is achieved, but the amplitude of ringing increases and causes voltage to drop below threshold

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidringing amplitude
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent uses an intermediary approach by introducing a delay mechanism that mediates between the synchronous rectifier controller and the ringing signal. Instead of directly synchronizing with the harmful ringing, the delay mechanism allows the controller to wait for proper synchronization timing, thereby avoiding amplification of ringing while achieving accurate synchronization with the primary side

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If the secondary MOSFET is turned on while the primary MOSFET is conducting, then current flow is enabled, but transformer saturation occurs and high current damages the converter

Engineering Contradiction:
Improvecurrent flowVSAvoidtransformer saturation resistance
Core Design Contradiction:
Ease of operationVSStrength

Solution Approach 1:

The patent applies preliminary anti-action by implementing a delay mechanism that proactively prevents the harmful condition before it can occur. The delay temporarily disables the synchronous rectifier controller upon activation, preventing the secondary MOSFET from turning on during primary MOSFET conduction, thereby avoiding transformer saturation and high current damage before these issues can manifest

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS9768703B2Shoot-through prevention in switched-mode power supplies
Publication Date: 2017.09.19 APPLE INC
  • US9768703B2 patent drawing
  • US9768703B2 patent drawing
  • US9768703B2 patent drawing

AI summary

The disclosed embodiments provide a system that operates a flyback converter. During activation of a synchronous rectifier (SR) controller on a secondary side of the power converter, the system temporarily disables driving of a gate of a metal-oxide-semiconductor field-effect transistor (MOSFET) by the SR controller to enable synchronization of the SR controller to a switching frequency on a primary side of the power converter. After driving of the gate of the MOSFET by the SR controller has been disabled for a pre-specified period, the system enables driving of the gate of the MOSFET by the SR controller.