Flyback Transformer Secondary Controller Feed-Forward Sensing
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Solution Overview
Problem
Existing AC-DC converters with secondary side control and synchronous rectifier sense architecture face challenges in reducing cost and complexity while maintaining efficiency, due to high voltage requirements and inaccurate valley detection, leading to increased size, complexity, and cost.
Innovation Solution
The implementation of a single synchronous rectifier sense pin coupled to the drain of the synchronous rectifier, along with a VBUS voltage-to-current converter, sample and hold circuit, and turn ratio cancellation and signal circuit, allows for accurate feed-forward sensing and reduced component count, using a voltage divider to limit maximum input voltage and enable the use of standard low-voltage technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external clamping circuits are used to clip the input to the secondary side controller, then high voltage protection is achieved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts the voltage clipping function from external discrete components and integrates it into the secondary side controller IC itself. The clamp circuit is built using standard low-voltage transistors and resistors that are fabricable within the IC, eliminating the need for external clamping components and reducing overall device complexity.
Solution Approach 2:
The patent merges multiple functions into the secondary side controller IC: voltage sensing, voltage clipping/protection, and control logic are all integrated into a single chip. This consolidation eliminates external clamping circuits and reduces the total component count, thereby reducing device complexity and manufacturing cost.
2Reliability
If high voltage tolerant FETs are used on the SR_DRAIN node, then high voltage handling capability is achieved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts the high voltage handling requirement from the FET selection and instead addresses it through circuit topology and voltage division. By using a voltage divider network and clamp circuit, the patent allows standard low-voltage FETs to be used while still achieving high voltage handling capability through the overall circuit design.
Solution Approach 2:
The patent changes the voltage parameters seen by the FET through a voltage divider network. The voltage divider reduces the high drain voltage to a level that standard low-voltage FETs can handle, while the clamp circuit ensures the voltage never exceeds safe levels. This parameter transformation allows the use of cheaper, lower-voltage-rated components.
3Loss of energy
If valley detection accuracy is improved, then converter efficiency is improved, but device complexity increases
Solution Approach 1:
The patent combines valley detection functionality with the existing voltage sensing circuitry already present in the secondary side controller. By utilizing the same pin and integrated circuit resources for both voltage sensing and valley detection, the patent achieves accurate valley detection without adding separate detection circuits, thereby maintaining low device complexity.
Solution Approach 2:
The patent makes the voltage sensing pin and circuit serve multiple functions: it senses the drain voltage for overvoltage protection, provides feedforward voltage information for control, and enables valley detection for efficiency optimization. This multi-functionality eliminates the need for dedicated valley detection hardware, reducing device complexity while improving efficiency.
Data Source
AI summary
An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side integrated circuit (IC) controller of the AC-DC converter includes a SR-SNS pin, a VBUS_IN pin, a first voltage-to-current converter, a sample-and-hold (S/H) circuit, a second voltage-to-current converter, and a signal generation circuit. The first voltage-to-current converter is coupled to remove a component of the output bus voltage sensed on the VBUS_IN pin from the voltage sensed on the SR-SNS pin. The S/H circuit is coupled to sample the voltage sensed on the SR-SNS pin and to provide a sampled voltage. The second voltage-to-current converter is coupled to convert the sampled voltage to a feed-forward current. The signal generation circuit is coupled to receive the feed-forward current and to generate feed-forward signals used to control operation of a primary side of the AC-DC converter.


