Flying Capacitor Rectifier Control for ZVS at Critical Duty Cycles
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Solution Overview
Problem
Achieving zero-voltage switching (ZVS) in flying capacitor multi-level (FCML) converters is challenging due to inductor current ripple collapse at certain duty cycles, especially with phase-shifted modulation schemes, which results in difficult ZVS operation and undesirable transients in FCML PFC converters.
Innovation Solution
A FCML rectifier with a control circuit that employs at least one of two modulation schemes: the first scheme synchronizes the rising edges of control signals for N lower switches to achieve ZVS, and the second scheme controls phase-shift and switching frequency to achieve ZVS with minimal conduction loss, using redundant switching states to maintain charge balance and reduce inductor current ripple.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If phase-shifted modulation scheme is used in FCML converters, then flying capacitor voltages are balanced and dv/dt is reduced, but inductor current ripple collapses at certain duty cycles making ZVS difficult to achieve
Solution Approach 1:
The patent applies dynamic modulation schemes that adaptively adjust switching patterns based on real-time operating conditions. The control circuit dynamically selects between different modulation strategies (phase-shifted modulation for normal operation, alternative modulation for critical transition points) to maintain ZVS across the entire duty cycle range, resolving the contradiction between voltage balance stability and ZVS reliability.
Solution Approach 2:
The patent changes modulation parameters dynamically - specifically adjusting phase shifts and duty cycles based on input voltage levels. At critical transition points where traditional phase-shifted modulation causes current ripple collapse, the control circuit modifies modulation parameters to maintain sufficient current ripple for ZVS while accepting temporary deviations from optimal voltage balance.
2Volume of moving object
If switching frequency is increased to reduce passive component size, then converter size is reduced, but achieving ZVS becomes more challenging due to reduced current ripple
Solution Approach 1:
The patent employs periodic modulation patterns that ensure sufficient current ripple is maintained at every switching cycle. By using structured periodic switching sequences with controlled on/off intervals, the system maintains adequate current ripple even at high switching frequencies, enabling both size reduction and reliable ZVS operation.
Solution Approach 2:
The control circuit performs preliminary adjustment of switching patterns before critical transition points occur. By anticipating duty cycle changes and pre-adjusting modulation parameters, the system maintains sufficient current ripple buildup time, ensuring ZVS is achieved even when operating at high switching frequencies that would otherwise cause current ripple collapse.
3Stress or pressure
If standard phase-shifted modulation is used, then device voltage stress is reduced, but conduction losses increase due to inability to maintain ZVS at all operating points
Solution Approach 1:
The patent implements feedback control that monitors operating conditions and adjusts modulation strategies accordingly. The control circuit detects when operating points approach critical transition zones where ZVS would be lost, and provides feedback to modify switching patterns proactively, maintaining ZVS and minimizing conduction losses while preserving the voltage stress benefits of multi-level topology.
Solution Approach 2:
The system dynamically transitions between different modulation modes to optimize the trade-off between voltage stress and conduction losses. During normal operation, phase-shifted modulation provides voltage stress reduction; near critical transition points, the system dynamically switches to alternative modulation patterns that prioritize maintaining ZVS, thereby minimizing conduction losses across the entire operating range.
Data Source
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AI summary
FCML rectifiers and control methods thereof are provided. The FCML rectifier operates with an input voltage (vin) and includes an inductor (L), a plurality of upper switches (S1, S2, S3 ..., SN), and a plurality of lower switches (S1, S2, S3..., SN). The upper and lower switches are electrically connected in series. The inductor (L) is coupled between the input voltage (vin) and a midpoint between the upper switches (S1, S2, S3 ..., SN) and the lower switches (S1, S2, S3..., SN). During critical transition points, at least one of first and second modulation schemes is performed. In the first modulation scheme, any rising edge of the control signal of any one lower switch (S1, S2, S3..., SN) is controlled to be synchronous with a rising edge of the control signal of at least one another lower switch (S1, S2, S3..., SN) for achieving ZVS. In the second modulation scheme, a phase-shift (Ø) of the control signals and a switching frequency (fs) are controlled to achieve ZVS with minimum conduction loss.