FMA Circuitry Denormal Handling via Auxiliary Storage
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Solution Overview
Problem
Fused-multiply-accumulate (FMA) operations in data processing systems face inefficiencies due to the need for denormal handling, which consumes processing resources and slows down operations, especially in applications where denormal numbers are rare.
Innovation Solution
Implementing a denormal detection mechanism that separates denormal handling from the FMA pipeline using auxiliary storage, allowing denormal handling to be executed independently and only when necessary, thereby reducing resource demands and improving processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If denormal handling is integrated into the FMA pipeline, then denormal numbers can be processed, but processing resources are consumed and processing speed decreases
Solution Approach 1:
The patent extracts denormal handling from the main FMA pipeline by implementing a separate denormal detection mechanism and auxiliary storage system. Denormal detection is performed independently before the FMA operation, and when denormal numbers are detected, they are handled separately using auxiliary storage rather than blocking the main pipeline. This allows the FMA pipeline to continue processing normal operations at full speed while denormal handling occurs in parallel or sequentially only when needed.
2Reliability
If denormal handling is performed for every FMA operation, then all denormal cases are covered, but resource consumption increases unnecessarily
Solution Approach 1:
The patent implements partial action by performing denormal detection selectively rather than applying full denormal handling to every FMA operation. The system detects denormal numbers using a lightweight mechanism and only activates the complete denormal handling sequence (including auxiliary storage operations) when denormal numbers are actually present. For normal operations, the system proceeds directly with standard FMA processing, consuming minimal resources.
3Productivity
If denormal handling is separated from the FMA pipeline using auxiliary storage, then processing speed improves, but device complexity increases
Solution Approach 1:
The patent segments the FMA processing system into distinct functional components: a main FMA pipeline for normal operations, a separate denormal detection mechanism, and an auxiliary storage system for denormal handling. This segmentation allows each component to be optimized independently - the main pipeline remains simple and fast for normal operations, while the denormal handling subsystem handles edge cases without interfering with the primary function.
Data Source
AI summary
The present disclosure relates to a data processing apparatus comprising: instruction decode circuitry to decode instructions; processing circuitry to execute said instructions decoded by said instruction decode circuitry, said processing circuitry comprising fused-multiply-accumulate, FMA, circuitry to respond to a fused-multiply-accumulate, FMA, instruction decoded by said instruction decoder, said FMA instruction specifying a first floating-point operand (a), a second floating-point operand (b) and a third floating-point operand (c); and an operand storage module operable to store said first floating-point operand, said second floating-point operand, and said third floating-point operand, wherein, responsive to said FMA instruction, said FMA circuitry is configured to: perform denormal detection on said first floating-point operand, said second floating-point operand and said third floating-point operand to determine if one or more of said first floating-point operand, said second floating-point operand or said third floating-point operand meets a first denormal condition; upon determining that at least one of said first floating-point operand, said second floating-point operand or said third floating-point operand meets said first denormal condition, execute a denormal handling instruction to: generate a shifted first floating-point operand (ta) based on said first floating-point operand, a shifted second floating-point operand (tb) based on said second floating-point operand, and a shifted third floating-point operand (tc) based on said third floating-point operand; write said shifted first floating-point operand, said shifted second floating-point operand and said shifted third floating-point operand to auxiliary storage of said operand storage module, said auxiliary storage being temporary storage configured within said operand storage module and assigned to said denormal handling instruction; and execute said FMA instruction using said shifted first floating-point operand, said shifted second floating-point operand and said shifted third floating-point operand to generate a shifted FMA output.