Fused Multiply-Add Engine for Mixed Binary Integer and Floating Point Output
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Solution Overview
Problem
Current floating-point units face challenges in efficiently performing high-precision floating-point computations, particularly in deep learning neural networks, where numerous floating-point operations are required, leading to computationally demanding workloads and limited throughput due to the need for precise decimal places across various operations.
Innovation Solution
A floating-point unit with a Fused Multiply-Add (FMA) engine that processes three floating-point inputs to produce either a binary integer or floating-point output based on a selector, optimizing computations by avoiding additional conversion operations and enhancing precision through a result format selector.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If floating-point computations are performed with high precision to satisfy different application needs, then measurement precision is improved, but device complexity increases and productivity decreases
Solution Approach 1:
The FPU is segmented into specialized functional blocks: an FMA engine for fused multiply-add operations, a conversion engine for format transformations, and a selector mechanism for choosing between binary integer and floating-point output formats. This segmentation allows each block to be optimized independently, reducing overall complexity while maintaining high precision capabilities.
Solution Approach 2:
The FPU is designed as a multi-functional unit that can perform both floating-point computations and binary integer operations through the selector. The same hardware infrastructure (FMA engine, conversion engine) serves multiple purposes, reducing the need for separate dedicated circuits for each operation type, thereby reducing device complexity while maintaining precision.
2Measurement precision
If multiple floating-point operations are performed in deep learning neural networks, then computational accuracy is improved, but productivity decreases due to computationally demanding workloads
Solution Approach 1:
The FMA engine merges the multiplication and addition operations into a single fused operation that computes (a × b) + c in one computational pass. This merging eliminates the need for separate multiply and add operations, reducing the total number of operations required in deep learning neural networks while maintaining full computational accuracy.
Solution Approach 2:
The conversion engine performs format conversions in advance or in parallel with the main computation pipeline. By preparing conversion operations beforehand or concurrently, the FPU avoids sequential processing delays, thereby improving computation throughput without sacrificing accuracy.
3Manufacturing precision
If floating-point to binary integer conversion is performed separately after FMA operations, then manufacturing precision is maintained, but loss of time increases
Solution Approach 1:
The conversion function is merged with the FMA operation itself. The FPU includes a conversion engine that can transform the result of the FMA operation into binary integer format without requiring a separate conversion step. This integration maintains precision while eliminating the time loss associated with sequential conversion operations.
Solution Approach 2:
The conversion engine operates continuously alongside the FMA engine, allowing format transformations to occur in parallel or immediately following the main computation without interrupting the computational flow. This continuity ensures that precision is maintained while minimizing the time penalty for conversions.
4Productivity
If specialized accelerators are designed for high throughput density, then productivity is improved, but use of energy increases
Solution Approach 1:
The FPU is designed as a universal accelerator that can handle both floating-point and binary integer operations within the same hardware infrastructure. This multi-functionality reduces the need for separate specialized accelerators, lowering overall power consumption while maintaining high throughput density through efficient resource utilization.
Data Source
AI summary
Provided are a floating-point unit, a system, and method for generating binary integer output or floating-point output based on a selector. A first input operand, a second input operand, a third input operand, and a result format selector value are received. The first input operand, the second input operand, and the third input operand comprise floating-point values. The first input operand, the second input operand, and the third input operand are processed to produce a final result comprising one of a binary integer value and a floating point value based on the result format selector value.