FMCW Radar Interference Mitigation via Inter-Frame Chirp Dithering
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Solution Overview
Problem
Existing FMCW radar systems face interference issues due to similar chirp timing in multiple radar systems, leading to increased noise floor and reduced detection sensitivity for weak targets, particularly when intra-frame chirp dithering is employed.
Innovation Solution
Implementing inter-frame chirp dithering, where each series of chirps has a distinct inter-chirp time, and optionally combining it with frame dithering and slope dithering to adjust the timing and slope of chirps across frames, thereby reducing interference without introducing phase noise into the Doppler FFT.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If intra-frame chirp dithering is employed to reduce radar interference, then interference mitigation is improved, but the noise floor increases and detection sensitivity for weak targets deteriorates
Solution Approach 1:
The patent applies dynamics by transitioning from static intra-frame chirp dithering to dynamic inter-frame chirp dithering. The chirp timing is varied between frames rather than within frames, allowing the system to adapt timing across multiple frames. This dynamic adjustment spreads interfering signals across different time slots, reducing their impact on any single measurement while maintaining coherent processing across frames.
Solution Approach 2:
The patent moves the dithering operation from the intra-frame dimension to the inter-frame dimension. Instead of varying chirp timing within a frame (intra-frame), the system varies the timing between consecutive frames (inter-frame). This dimensional shift allows interference to be distributed across different temporal dimensions while maintaining frame coherence for accurate target detection.
2Object-affected harmful factors
If inter-frame chirp dithering is implemented to reduce interference, then the number of affected cells is reduced, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by modifying the inter-chirp time parameter between frames. Instead of changing timing within frames, the system adjusts the time parameter between consecutive frame transmissions. This parameter modification is implemented through simple timing adjustments in the signal generation module, adding minimal complexity while effectively distributing interfering signals across different temporal slots.
Data Source
AI summary
A non-transitory computer-readable storage device stores machine instructions. When executed by one or more processors, the machine instructions cause the one or more processors to determine a first inter-chirp time with respect to a first series of chirps; and determine a second inter-chirp time with respect to a second series of chirps, in which the second inter-chirp time is different than the first inter-chirp time and is based on the first inter-chirp time and a chirp dither value. In another implementation, an oscillator receives chirp configuration signals, which contain the inter-chirp times, and generate the first and second series of chirps with the first and second inter-chirp times, respectively. Transmitter circuitry, coupled to the oscillator, transmits each of the first and second series of chirps with the respective inter-chirp time.


