Foldable Display Fan-Out Wiring for Smaller Bezels
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display apparatuses face challenges in reducing the non-display area and achieving uniform light emission between adjacent pixels, particularly in flexible and foldable organic light-emitting display devices.
Innovation Solution
The display apparatus incorporates a substrate with a non-display area comprising a first area, a second area, and a bent area, featuring a fan-out portion with multiple data lines in different layers and configurations to transfer signals efficiently, including first and second data lines in distinct or overlapping layers, and utilizing a shield layer for improved signal transfer and light uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the non-display area is reduced to increase display area, then the display area increases, but the wiring complexity and signal transfer difficulty increase
Solution Approach 1:
The patent applies fan-out wiring that extends data lines in multiple layers and directions, transitioning from planar 2D routing to 3D spatial routing. This allows signals to reach pixels at the edges of the reduced non-display area by utilizing vertical layer transitions and diagonal routing paths, effectively solving the wiring complexity issue while maintaining minimal non-display area.
Solution Approach 2:
The patent implements multi-layer wiring structures where data lines are nested across different layers (first layer, second layer, third layer) with contact holes connecting them. This nested arrangement allows compact routing of signals through stacked layers, reducing the horizontal space required for wiring and enabling smaller non-display areas without compromising signal delivery capability.
2Reliability
If data lines are extended to reach edge pixels, then all pixels receive signals, but light emission uniformity deteriorates due to varying line lengths
Solution Approach 1:
The patent applies different wiring configurations to different regions: central pixels receive signals through shorter, direct paths while edge pixels receive signals through extended fan-out paths. This localized adaptation of wiring length and routing allows each pixel to receive adequate signal strength appropriate to its position, maintaining uniform light emission across the display area despite varying distances from the driver circuit.
Solution Approach 2:
By extending data lines into multiple vertical layers and utilizing diagonal routing paths, the patent creates three-dimensional signal distribution networks. This dimensional expansion allows signals to reach edge pixels without excessive horizontal line lengths, reducing RC delays and maintaining signal integrity and light emission uniformity across all pixels.
3Productivity
If multiple data lines are arranged in different layers, then signal transfer efficiency improves, but manufacturing complexity increases
Solution Approach 1:
The patent divides the data line routing into multiple discrete layers, with each layer containing specific segments of the overall signal path. Contact holes are strategically placed to connect corresponding segments between layers. This segmentation allows independent optimization of each layer's routing while maintaining overall signal integrity, improving transfer efficiency without overwhelming manufacturing complexity.
Data Source
AI summary
A display apparatus includes: a substrate including a display area and a non-display area, where the non-display area includes a first area, a second area, a bent area and a pad area, and the bent area is arranged between the first area and the second area; a display portion arranged in the display area; a driving circuit portion arranged in the non-display area; and a fan-out portion arranged between the display portion and the driving circuit portion and in the first area, the bent area and the second area, where the fan-out portion transfers a data signal from the driving circuit portion to the display portion. The fan-out portion includes a first data line including a first first data line arranged in the second area and a second first data line arranged in the pad area and disposed in a layer different from the first first data line.