Folded One-Bit A/D Converter for Continuous Transfer Stability

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Solution Overview

Problem

Existing A/D conversion circuits experience unstable operation due to discontinuities in their direct-current transfer characteristics, particularly when handling high-speed input voltages or transient signals, leading to incorrect output values.

Innovation Solution

An A/D conversion circuit is designed with N stages of cascade-connected one-bit A/D converters, where each stage has a direct-current transfer characteristic folded symmetrically around the center voltage, utilizing first and second amplifier circuits, a third interpolating amplifier circuit, a comparator, and a selector to ensure stable operation by inverting signal polarities and selecting outputs based on the comparator's output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional one-bit A/D converter configuration is used, then the circuit can perform A/D conversion, but the direct-current transfer characteristic exhibits discontinuities causing unstable operation

Engineering Contradiction:
Improveoperational stabilityVSAvoidtransfer characteristic continuity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by intentionally introducing a DC offset voltage to one of the input signals of the differential amplifier. This asymmetric adjustment shifts the transfer characteristic curve to eliminate discontinuities, transforming the symmetric but discontinuous transfer function into an asymmetric but continuous one, thereby resolving the operational stability issue.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent changes the DC operating point parameter by adding a controllable DC offset voltage to the input signal. This parameter adjustment modifies the transfer characteristic to ensure continuity, allowing the circuit to operate stably without the discontinuities that plague conventional designs.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the input voltage fluctuates near critical points in conventional A/D converters, then the output may be correct, but discontinuities cause incorrect output values

Engineering Contradiction:
Improveoutput accuracyVSAvoidoutput stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by pre-compensating for potential discontinuities through DC offset adjustment. Before the fluctuation issue can manifest as incorrect output, the transfer characteristic is预先 adjusted to be continuous, preventing the problem rather than correcting it after occurrence.

Inventive Principle:
Principle #9Preliminary anti-action

3Productivity

If high-speed operation is implemented in conventional A/D converters, then conversion speed increases, but discontinuities cause unstable operation

Engineering Contradiction:
Improveconversion speedVSAvoidoperation stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent uses asymmetry through DC offset adjustment to create a continuously varying transfer characteristic that remains stable even at high conversion speeds. The asymmetric biasing ensures that the amplifier operates in a linear region without discontinuities, maintaining reliability during high-speed operation.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS8674869B2A/D conversion circuit
Publication Date: 2014.03.18 NEC CORP
  • US8674869B2 patent drawing
  • US8674869B2 patent drawing
  • US8674869B2 patent drawing

AI summary

Each of cascade-connected one-bit A/D converters includes first and second amplifier circuits receiving first and second input signals, a third amplifier circuit that outputs an interpolation value of outputs of the first and second amplifier circuits, a comparator that outputs a binary signal having value determined by a polarity of an output of the third amplifier circuit, and a selector that selects two of three outputs of the first to third amplifier circuits, based on a value of the comparator. The selector is set such that direct-current transfer characteristics of two outputs of the selector are folded and symmetrical relative to the midpoint of the first and second input signals.