Folded Cascode Op-Amp Biasing for Wide Common-Mode Input

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Solution Overview

Problem

Operational amplifiers using lower voltage transistors face reliability issues when operated at higher supply voltages, limiting the input common-mode voltage range and affecting performance parameters like delay and offset, necessitating a tradeoff between performance and reliability.

Innovation Solution

The proposed input stage for operational amplifiers employs a cascode bias generation circuit and a folded cascode configuration with transistors rated for lower voltages, ensuring that the voltage difference across any pair of terminals does not exceed the transistor rating, even at higher supply voltages, by using a fixed voltage biasing scheme to maintain the common-mode voltage range without reliability issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If lower voltage transistors are used in the operational amplifier, then performance parameters (delay, offset) are improved, but reliability deteriorates when operated at higher supply voltages

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidinput common-mode voltage range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

A cascode bias generation circuit is introduced as an intermediary component between the higher supply voltage and the lower voltage transistors. This circuit generates a scaled-down voltage that serves as the supply voltage for the input stage, allowing the transistors to operate reliably at their rated voltage while the overall amplifier can handle higher input common-mode voltages through the voltage scaling mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the supply voltage parameter dynamically through the cascode bias circuit. The input stage transistors receive a scaled version of the supply voltage (e.g., if supply is 3.3V, the input stage receives approximately 1.8V), allowing the transistors to operate within their voltage ratings while the amplifier accepts a wider input common-mode voltage range.

Inventive Principle:
Principle #35Parameter changes

2Power

If higher supply voltage is applied to operational amplifier, then power handling capability is improved, but transistor reliability deteriorates due to exceeding voltage ratings

Engineering Contradiction:
Improvepower handling capabilityVSAvoidtransistor reliability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The cascode bias generation circuit acts as a voltage scaling intermediary that allows the amplifier to accept higher supply voltages for improved power handling while protecting the input stage transistors by providing them with a scaled-down voltage that remains within their voltage ratings.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If input common-mode voltage range is widened, then adaptability is improved, but voltage across transistor terminals may exceed ratings causing reliability issues

Engineering Contradiction:
Improveinput common-mode voltage rangeVSAvoidtransistor reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent transforms the voltage relationship by using the cascode bias circuit to scale the supply voltage down to an appropriate level for the input stage transistors. This parameter transformation allows the amplifier to accept a wide input common-mode voltage range (e.g., 0V to 2.1V) while the transistors operate at safe voltage levels determined by their ratings.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11418154B1Biasing technique for an operational amplifier
Publication Date: 2022.08.16 TEXAS INSTRUMENTS INC
  • US11418154B1 patent drawing
  • US11418154B1 patent drawing

AI summary

A circuit includes first through fourth transistors and a device. The first transistor has a control input and first and second current terminals. The control input provides a first input to the circuit. The second transistor has a control input and first and second current terminals. The control input provides a second input to the circuit. The third transistor has a control input and first and second current terminals. The fourth transistor has a control input and first and second current terminals. The second current terminal of the fourth transistor is coupled to the second current terminal of the third transistor, and the control input of the fourth transistor is coupled to the first current terminals of the first and second transistors. The device is configured to provide a fixed voltage to the control input of the third transistor.