Folded Cascode Amplifier Self-Biasing for Low-Power Gain Boost
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Solution Overview
Problem
Existing operational amplifiers in integrated circuits face challenges with high power consumption, large footprint, and limited gain due to the need for multiple external biasing voltages, which also introduce noise and area overhead.
Innovation Solution
The proposed amplifier circuit employs a folded cascode configuration with transistors biased in the subthreshold region, utilizing a resistive element to reduce the number of external biasing voltages and operate in a self-biased, gain-boosted mode, enhancing DC gain and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple external biasing voltages are used in operational amplifiers, then the amplifier can achieve proper biasing and operation, but the power consumption increases and the area overhead increases
Solution Approach 1:
The amplifier circuit uses self-biasing where the output of the amplification circuit directly biases the gates of the drive transistors, eliminating the need for external biasing voltage sources. The circuit serves its own biasing needs through internal feedback mechanisms, reducing power consumption and area overhead while maintaining proper operational biasing.
2Reliability
If multiple external biasing voltages are used in operational amplifiers, then the amplifier can achieve proper biasing and operation, but the area overhead increases due to additional components
Solution Approach 1:
The amplifier circuit uses self-biasing where the output of the amplification circuit directly biases the gates of the drive transistors, eliminating the need for external biasing voltage sources. The circuit serves its own biasing needs through internal feedback mechanisms, reducing power consumption and area overhead while maintaining proper operational biasing.
3Object-affected harmful factors
If external biasing voltages are used, then noise is introduced into the amplifier circuit, but removing them requires alternative biasing solutions
Solution Approach 1:
The amplifier circuit uses self-biasing where the output of the amplification circuit directly biases the gates of the drive transistors, eliminating the need for external biasing voltage sources. The circuit serves its own biasing needs through internal feedback mechanisms, reducing power consumption and area overhead while maintaining proper operational biasing.
4Use of energy by moving object
If transistors are biased in subthreshold region, then power consumption is reduced, but the gain may be limited
Solution Approach 1:
The patent operates transistors in the subthreshold region by adjusting bias conditions and transistor dimensions to achieve low-power operation. This parameter change enables the circuit to function with significantly reduced power consumption while the amplification circuit provides necessary gain through its configuration and feedback mechanisms.
Data Source
AI summary
A first embodiment is directed to a circuit including a positive biasing circuit with a drive PMOS for biasing in subthreshold, a negative biasing circuit with a drive NMOS for biasing in subthreshold, and an amplification circuit coupled to the biasing circuits. The amplification circuit includes a first stage with a first boosting stage, a second stage with a second boosting stage, and a resistive element coupled between the first and second stages. A second embodiment is directed to a folded cascode operational amplifier wherein a value of the resistive element is selected to place at least one of a drive MOS in subthreshold. A third embodiment is directed to an integrated circuit with a resistive area neighboring a first boosting area and a second boosting area, the resistive area including a resistive element directly connected to a drive PMOS and a drive NMOS.