Folded Channel DEMOS Transistor for High Current Density
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Solution Overview
Problem
Current semiconductor devices with planar MOS transistors face limitations in current density and specific on-resistance, necessitating improvements for enhanced performance in power circuits.
Innovation Solution
The introduction of a folded drain extended metal oxide semiconductor (DEMOS) transistor with a corrugated substrate and specific layer structures, including a gate dielectric layer, gate, drift region, field plate dielectric layer, and field plate, extending continuously along the upper and lateral portions, which facilitates improved current flow and reduced resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a planar MOS transistor structure is used, then the device is simple to manufacture, but the current density and specific on-resistance are limited
Solution Approach 1:
The patent transforms the planar two-dimensional channel structure into a folded three-dimensional channel structure by introducing lateral portions that extend in the lateral direction. This dimensional change increases the effective channel area without proportionally increasing the footprint, thereby improving current density while managing structural complexity
Solution Approach 2:
The channel is segmented into multiple portions including an upper portion, lower portion, and lateral portions that are folded back. This segmentation allows the channel to utilize the drift region more efficiently by creating multiple current paths, improving current density and reducing specific on-resistance
2Power
If the drain potential is increased for higher power output, then the power capability is improved, but the specific on-resistance increases
Solution Approach 1:
The folded channel structure extends the effective channel length in the lateral direction, allowing the transistor to handle higher drain potentials by distributing the voltage stress across multiple channel segments. This reduces the specific on-resistance while maintaining high power capability
Solution Approach 2:
The drift region is configured with specific doping profiles in different areas to optimize the electric field distribution. The lateral portions of the channel interact with the drift region to create localized field management, reducing overall specific on-resistance while enabling higher drain potentials
Data Source
AI summary
A semiconductor device includes a folded drain extended metal oxide semiconductor (DEMOS) transistor. The semiconductor device has a substrate including a semiconductor material with a corrugated top surface. The corrugated top surface has an upper portion, a lower portion, a first lateral portion extending from the upper portion to the lower portion, and a second lateral portion extending from the upper portion to the lower portion. The folded DEMOS transistor includes a body in the semiconductor material, a gate on a gate dielectric layer over the body, a drift region contacting the body, and a field plate on a field plate dielectric layer, all extending continuously along the upper portion, the first lateral portion, the second lateral portion, and the lower portion of the corrugated top surface. Methods of forming the folded DEMOS transistor are disclosed.