Folded Lead Frame Stacking for High-Density Embedded Capacitors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing processes for stacking discrete capacitors and other components are not scalable, limiting manufacturing throughput and cost-effectiveness in semiconductor devices.

Innovation Solution

A method involving a lead frame with strips and rails to stack discrete components, where each component bridges gaps between strips, and the frame is folded to create a stacked configuration, which is then encapsulated in a substrate with polymer, forming vias for terminal connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If existing processes for stacking individual discrete capacitors are used, then the footprint is reduced and capacitance density is increased, but manufacturing throughput is reduced and scalability is limited

Engineering Contradiction:
Improvecapacitance densityVSAvoidmanufacturing throughput
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The lead frame is segmented into multiple strips arranged end-to-end, with each strip capable of carrying discrete components. This segmentation allows multiple components to be processed simultaneously on different strips, enabling parallel manufacturing operations that increase throughput while maintaining high capacitance density through the stacked configuration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Discrete components are placed on the lead frame strips in advance before the stacking and folding operations. This preliminary placement allows for automated pick-and-place operations to be performed on a large number of components simultaneously, significantly improving manufacturing throughput compared to sequential stacking methods.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If discrete components are stacked to reduce footprint, then area is reduced and capacitance is increased, but the process is not scalable and cost effectiveness is reduced

Engineering Contradiction:
Improvefootprint areaVSAvoidmanufacturing scalability
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

Multiple discrete components are merged into a single stacked configuration on one lead frame. The folding process brings multiple components into close proximity, creating a compact three-dimensional structure that reduces footprint while maintaining scalability through standardized lead frame designs that can accommodate varying numbers of components.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The lead frame is folded to transform the two-dimensional arrangement of components into a three-dimensional stacked configuration. This dimensional transformation reduces the footprint area by utilizing vertical space, while the modular nature of the folded structure maintains manufacturing scalability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If stacked capacitor configuration is used, then capacitance density is increased and ESR is reduced, but manufacturing complexity and process difficulty increase

Engineering Contradiction:
Improveequivalent series resistanceVSAvoidstacking process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The lead frame structure itself provides the stacking mechanism through its folded configuration. The frame's geometry automatically positions components in the desired stacked arrangement, eliminating the need for complex external stacking equipment or multi-step assembly processes, thereby reducing manufacturing complexity while achieving low ESR through short conduction paths.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The lead frame acts as an intermediary that simplifies the stacking process. By using the lead frame's folded structure as the stacking mechanism, the patent avoids complex automated stacking equipment while still achieving the benefits of reduced ESR and increased capacitance density through the compact three-dimensional configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12185469B1Lead frame and method for stacking discrete components to be embedded in semiconductor device
Publication Date: 2024.12.31 SARAS MICRO DEVICES INC
  • US12185469B1 patent drawing
  • US12185469B1 patent drawing
  • US12185469B1 patent drawing

AI summary

A method of stacking discrete components to be embedded in a semiconductor device comprises providing a lead frame defining a plurality of strips arranged end-to-end lengthwise with a gap between each pair of adjacent strips, a rail extending parallel to the strips, and a plurality of segments respectively connecting the strips to the rail, placing a plurality of discrete components on the lead frame, each of the discrete components having electrically isolated first and second terminals and being placed so as to bridge the gap between a pair of adjacent strips with the first and second terminals of the discrete component being respectively on one of the pair of adjacent strips and the other of the pair of adjacent strips, removing the rail from the lead frame, and folding the lead frame between the discrete components so as to bring the discrete components into a stacked configuration.