Larger Folding-Area GIP Blocks for Display Stress Resistance
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Solution Overview
Problem
Foldable display apparatuses face reliability issues due to repeated application of compressive and tensile stresses during unfolding and folding, leading to damage and reduced lifespan of elements such as thin film transistors and lines.
Innovation Solution
The display apparatus is designed with larger GIP blocks in the folding area, featuring longer thin film transistors and wider lines, and a double gate electrode configuration to enhance resistance to stress without increasing the bezel size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the GIP block size is increased in the folding area to improve stress resistance, then the reliability is improved, but the bezel area increases
Solution Approach 1:
The patent applies different GIP block sizes to different regions: larger GIP blocks are placed in the folding area where stress resistance is critical, while smaller GIP blocks are used in the flat area. This localized differentiation improves reliability in the folding area without unnecessarily increasing the bezel area across the entire display.
Solution Approach 2:
The patent introduces asymmetric GIP block dimensions, specifically making the second GIP block in the folding area longer in the first direction (parallel to folding axis) compared to the first GIP block in the flat area. This asymmetric design provides enhanced stress resistance where needed while maintaining compact bezel dimensions in other regions.
2Strength
If the thin film transistor length is increased to enhance stress resistance, then the strength is improved, but the manufacturing complexity increases
Solution Approach 1:
The patent implements different thin film transistor configurations in different regions: transistors in the folding area have longer channel lengths and double gate electrodes for enhanced stress resistance, while transistors in the flat area use standard single gate configurations. This localized approach provides necessary strength where stress occurs without complicating the entire manufacturing process.
Solution Approach 2:
The patent modifies specific transistor parameters (channel length and gate electrode configuration) only in the folding area where stress resistance is critical. By changing these parameters locally rather than globally, the patent achieves the required strength improvement while minimizing the impact on manufacturing complexity.
3Reliability
If the line width is increased to improve stress resistance, then the reliability is improved, but the area occupied by GIP blocks increases
Solution Approach 1:
The patent applies wider line widths specifically to the second GIP block in the folding area where stress resistance is critical, while maintaining standard line widths in the first GIP block in the flat area. This localized line width differentiation improves reliability in the folding area without unnecessarily increasing the total GIP block area.
Data Source
AI summary
A display apparatus includes a display panel including a display area and a non-display area, the display panel having a first direction in a long side direction and a second direction in a short side direction, a flat area and a folding area of the non-display area disposed at left and right sides of the display area, and a plurality of first GIP (Gate In Panel) blocks and second GIP blocks disposed in the flat area and the folding area, wherein the size of the second GIP block is larger than that of the first GIP block.