Follower Node Anti-Noise Circuit for Parasitic Voltage Discharge
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Solution Overview
Problem
Semiconductor circuits face issues with parasitic noise voltage distortion at follower nodes due to parasitic capacitive coupling, leading to unintended follower circuit shutdowns when the tie-low circuit is deactivated.
Innovation Solution
Incorporating an anti-noise circuit connected between the follower node and the power supply voltage, which discharges parasitic noise voltage by conducting when the tie-low circuit is off, ensuring the follower voltage remains stable and preventing unintended follower circuit shutdowns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the tie-low circuit is deactivated to save power or reduce interference, then power consumption is reduced, but parasitic noise voltage accumulates at the follower node causing unintended circuit shutdown
Solution Approach 1:
An anti-noise circuit is introduced as an intermediary component between the follower node and ground. This circuit includes a noise discharge transistor that activates when the tie-low circuit is deactivated, providing a discharge path for parasitic noise voltage accumulated at the follower node through parasitic capacitance, thereby preventing unintended follower circuit shutdown while maintaining power efficiency
Solution Approach 2:
The anti-noise circuit is designed to preemptively counteract the harmful effect of parasitic noise voltage accumulation. When the tie-low circuit is turned off, the anti-noise circuit activates in advance to discharge accumulated noise through the noise discharge transistor, preventing the noise from reaching threshold levels that would cause follower circuit malfunction
2Object-affected harmful factors
If the tie-low circuit remains continuously activated to prevent parasitic noise, then noise protection is maintained, but power consumption increases and electrostatic discharge protection functionality is compromised
Solution Approach 1:
The system transitions from a static tie-low circuit configuration to a dynamic dual-circuit arrangement. The tie-low circuit and anti-noise circuit operate in complementary modes: the tie-low circuit is activated during electrostatic discharge events while the anti-noise circuit handles normal parasitic noise discharge. This dynamic switching is controlled by a control signal that coordinates both circuits, optimizing power consumption while maintaining comprehensive protection
Solution Approach 2:
The noise protection function is segmented into two distinct circuits with specialized roles: the tie-low circuit handles electrostatic discharge protection and strong noise suppression, while the anti-noise circuit handles continuous parasitic noise discharge. This segmentation allows each circuit to be optimized for its specific function and enables selective activation based on operational requirements, reducing overall power consumption
3Loss of energy
If the tie-low circuit is deactivated during normal operation, then power consumption is reduced, but follower voltage stability deteriorates due to parasitic capacitive coupling
Solution Approach 1:
The anti-noise circuit serves as a mediator that maintains follower voltage stability when the tie-low circuit is deactivated. The noise discharge transistor in the anti-noise circuit provides a controlled discharge path for parasitic capacitance at the follower node, preventing voltage fluctuations and maintaining stable operation during normal low-power modes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The anti-noise circuit effectively reduces parasitic noise voltage effects, maintaining the follower voltage within safe thresholds and preventing follower circuit misoperation during tie-low circuit deactivation.
Implementation Method 1
parasitic noise voltage distortion at follower nodes due to parasitic capacitive coupling
Implementation Method 2
an anti-noise circuit connected between the follower node and the power supply voltage, which discharges parasitic noise voltage by conducting
Data Source
AI summary
A method includes receiving a first power voltage at a gate and first terminal of a first transistor having a second terminal connected to a first node, the first power being gated to provide voltage in a first or a second state; receiving a voltage at a gate of a second transistor coupled between the first node and a ground node; receiving a second power voltage at a follower circuit coupled to the first node; turning on the second transistor to pull the first node toward ground, when the first power voltage is in the first state; turning off the second transistor when the first power voltage is in the second state; and discharging parasitic noise voltage of the first node through the first transistor during at least part of a period in which the first power voltage is in the second state and less than the second power voltage.