Forbidden-State ECC Decoding for PAM3 and Three-State Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In data transmission and memory structures like PAM3 interfaces and new memory cells with three states, single error correction double error detection (SECDED) ECC is used, but there is a need to enhance error correction performance to handle induced errors from transfer errors.
Innovation Solution
An error correction method and circuit that includes a decoder and an ECC engine, which determines if an input analog code is at a forbidden state, sets a digital binary code, and uses the ECC engine to correct errors, resetting the code if two errors are detected, to enhance error correction ability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SECDED ECC is used for error correction in PAM3 interface or three-state memory, then single error correction capability is achieved, but error correction performance is insufficient when transfer errors induce multiple errors
Solution Approach 1:
The decoder preliminarily identifies forbidden states in the analog code before ECC correction, and preliminarily sets predetermined digital binary codes for these forbidden states. This preliminary action allows the system to handle potential multi-bit errors more effectively by pre-preparing correction strategies, improving reliability without significantly increasing device complexity
Solution Approach 2:
The ECC engine provides feedback to the decoder about the number of errors detected (no error, one error, or two errors). Based on this feedback, the decoder adjusts its correction strategy - using predetermined codes for two-error cases and standard decoding for single-error cases. This feedback mechanism enables adaptive error correction that improves performance while managing complexity
2Reliability
If predetermined codes are set for forbidden states and used when two errors are detected, then error correction ability is enhanced, but decoding process complexity increases
Solution Approach 1:
The decoder preliminarily identifies forbidden states and preliminarily sets predetermined digital binary codes before actual error correction is needed. This advance preparation simplifies the real-time decoding process by having correction strategies ready, reducing the computational complexity during active operation while enhancing error correction ability
Solution Approach 2:
The system changes the parameter of the digital binary code based on the error situation - using predetermined codes when two errors are detected and standard decoded codes when one or no errors are present. This parameter change approach allows flexible adaptation to different error conditions, improving reliability while keeping the decoding process manageable through conditional logic
Data Source
AI summary
An error correction method comprises: when a decoder determines that an input analog code is at a forbidden state, setting a digital binary code as a first predetermined code and inputting the digital binary code to an ECC engine; determining whether the digital binary code has no error or two errors; when the digital binary code has no error, outputting the digital binary code after ECC by the ECC engine; when the digital binary code has two errors, resetting the digital binary code as a second predetermined code and inputting the digital binary code to the ECC engine for ECC; and when the decoder determines that the input analog code is not at the forbidden state, decoding the input analog code into the digital binary code and inputting the digital binary code to the ECC engine for ECC.