Forcible Release Control Circuit for Low Power Semiconductor Devices

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Solution Overview

Problem

Existing semiconductor devices fail to effectively reduce power consumption and processing time associated with the release of low power consumption states, as they require the central processing unit to intervene in the control of power and clock supply to functional blocks, leading to inefficiencies in transitioning to and from low power modes.

Innovation Solution

A forcible release control circuit is introduced to independently manage the supply and stop of power and clocks in controlled circuits without needing the central processing unit, allowing for controlled release and reset of low power consumption states based on signal requests, thereby optimizing power management and processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the central processing unit controls the stop and supply of power and clocks to functional blocks through control registers, then power consumption can be reduced at standby mode, but the central processing unit must execute instructions to operate control registers even when releasing low power consumption state, preventing effective power reduction

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessing time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent extracts the control function for releasing low power consumption state from the central processing unit and assigns it to a dedicated release control circuit. This circuit independently controls the stop and supply of power and clocks to functional blocks based on release requests, eliminating the need for CPU intervention and instruction execution during state transitions, thereby reducing both power consumption and processing time

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The release control circuit acts as an intermediary between the low power consumption control circuit and the functional blocks. It receives release requests, independently manages the power and clock supply state transitions, and eliminates the bottleneck of CPU intervention, enabling efficient power management without sacrificing processing speed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If the central processing unit is used to control the release of low power consumption state, then complete control is achieved, but power consumption and processing time increase due to required instruction execution

Engineering Contradiction:
Improvecontrol capabilityVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The release control circuit provides self-service functionality by independently managing the release of low power consumption state without requiring central processing unit intervention. It autonomously controls power and clock supply based on release requests, maintaining complete control capability while eliminating the power consumption overhead associated with CPU instruction execution

Inventive Principle:
Principle #25Self-service

3Use of energy by moving object

If interrupt control is used to resume power and clocks in functional blocks, then low power consumption is achieved, but the previously indicated low power consumption state by CPU cannot be restored

Engineering Contradiction:
Improvepower consumptionVSAvoidstate restoration
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The release control circuit incorporates feedback mechanisms to monitor and track the power and clock supply states of functional blocks. Based on release requests and state information, it intelligently controls the resumption of power and clocks, ensuring that the central processing unit's originally indicated low power consumption state is accurately restored while maintaining efficient power management

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8499182B2Semiconductor device and data processing system
Publication Date: 2013.07.30 RENESAS ELECTRONICS CORP
  • US8499182B2 patent drawing
  • US8499182B2 patent drawing
  • US8499182B2 patent drawing

AI summary

A semiconductor device has reduced power consumption and processing time associated with the release of a low power consumption state set by a central processing unit thereof. The semiconductor device controls a relationship between a forcible release and reset of the low power consumption state previously set by the central processing unit. In one embodiment, a forcible release control circuit forcibly releases the supply and stop of power and clocks previously set to one or more controlled circuits, only during a period required by a signal outputted from a requesting circuit, which requesting circuit may be either internal to the device or external to the device. Once the request signal from the requesting circuit has ended, the controlled circuits and, if appropriate, the central processing unit as well, are restored to the original low power consumption state.