Formal Solver Enumerating Design Coverage Points
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Solution Overview
Problem
Conventional design verification methods face challenges in achieving exhaustive coverage of design specifications due to large solution spaces and manual processes, leading to incomplete coverage and increased resource consumption.
Innovation Solution
The use of formal verification methods, specifically formal solvers like SAT solvers, to generate and enumerate valid coverage points based on architectural specifications, allowing for iterative solutions and proof of exhaustive coverage, thereby streamlining the design verification process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional design verification methods are used, then manual processes can be applied, but coverage completeness deteriorates due to large solution spaces
Solution Approach 1:
The patent replaces manual verification processes with automated formal verification methods. Formal solvers and model checkers automatically explore the solution space and generate coverage reports, eliminating the need for manual analysis while ensuring comprehensive coverage despite the large solution space
Solution Approach 2:
The verification system performs self-verification through automated model checking and formal proof generation. The system automatically explores all possible states and transitions, generates coverage metrics, and validates design correctness without requiring external manual intervention
2Productivity
If manual verification processes are used, then resource consumption can be monitored, but verification efficiency deteriorates due to time-consuming manual analysis
Solution Approach 1:
Manual verification activities are replaced with automated formal verification tools that can explore solution spaces and generate coverage reports much faster than manual processes, significantly improving verification productivity while reducing time loss
Solution Approach 2:
The system performs preliminary automated analysis of the design model before manual review, pre-computing coverage metrics and identifying potential issues early in the verification process, thereby reducing the time required for subsequent manual analysis
3Reliability
If exhaustive coverage is pursued, then verification completeness improves, but resource usage increases due to large solution spaces
Solution Approach 1:
The verification process is segmented into multiple phases: symbolic model checking for exhaustive exploration of critical paths, formal proof generation for safety properties, and selective simulation for functional coverage. This segmentation allows exhaustive verification of essential aspects while managing overall computational resource usage
Solution Approach 2:
Different verification methods are applied to different parts of the design based on their criticality. Formal model checking is applied to safety-critical components requiring exhaustive coverage, while less critical components use lighter-weight verification methods, optimizing resource allocation
Data Source
AI summary
Formal verification methods are used to solve a valid model of a design-under-test (DUT) to enumerate valid coverage points based on an architectural specification of the DUT. A formal solver can be queried to solve for valid solutions by crossing one or more fields of a variable. After each valid solve, values of the variable fields can be recorded and a count for number of valid solutions can be incremented. A new rule can be added to the solving process after each valid solve to invalidate the recorded values of the variable fields for subsequent solves. The count for the number of valid solutions can provide a running total of the valid solutions found for the query. Results of the query can be processed to convert the recorded values to provide the enumerated coverage points. The enumerated coverage points can be converted to test cases for running simulations on the DUT.