Semi-Automatic Formal Verification Model Transformer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Formal verification of semiconductor designs with large C/C++ models is challenging due to the lack of a specification model that can be consumed by datapath formal verification tools, limiting the scope of methodologies like datapath C2RTL formal verification.
Innovation Solution
An automatic transformer with a human enabler tool is developed to semi-automatically generate a small essential model from a large source code repository, facilitating the creation of formal verification models for semiconductor designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a large C/C++ source code repository is used for formal verification, then the verification scope is improved, but the model consumability by formal verification tools deteriorates
Solution Approach 1:
The patent applies segmentation by dividing the large C/C++ source code repository into multiple smaller, manageable models. The system identifies and extracts specific functional components from the codebase, creating separate formal models for each component. This allows formal verification tools to process individual smaller models efficiently while maintaining comprehensive verification coverage across the entire system through hierarchical composition of these segmented models.
2Adaptability or versatility
If a large C/C++ source code repository is used for formal verification, then the verification scope is improved, but the ease of operation deteriorates
Solution Approach 1:
The patent implements self-service by enabling the system to automatically generate formal verification models from C/C++ source code without requiring manual model creation. The system includes automated code parsing, model extraction, and formal model generation capabilities that perform the tedious work of model creation autonomously. This self-service approach significantly reduces the operational burden on verification engineers while expanding the verification scope to cover larger codebases.
3Adaptability or versatility
If a large C/C++ source code repository is used for formal verification, then the verification scope is improved, but the time consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-processing and preparing the C/C++ source code repository before formal verification execution. The system performs upfront code analysis, identifies verification-relevant components, and generates formal models in advance. This preliminary preparation work organizes the codebase into verification-ready formats, reducing the time required during actual verification execution and enabling faster iteration cycles despite the large scope of code being verified.
Data Source
AI summary
Described herein are techniques to automatically create a software model which covers the core functionality of a semiconductor design to be formally verified and can be easily consumed by a formal verification tool for software or semiconductor designs. These techniques enable verification engineers to expand the scope of formal verification to fix both software and RTL bugs, saving significant design time and reducing the time to market of for new products.