Assertion-Based Formal Verification Using Unique Signature Values

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Solution Overview

Problem

Assertion-based formal verification processes face significant computational burdens due to repetitive checks of unchanged properties during design verification, leading to wasteful resource usage and prolonged processing times.

Innovation Solution

A method utilizing a unique signature function, such as a hash function (e.g., MD5 encoding), to calculate and save a unique signature value for each property instantiation, allowing only changed properties to be reverified, thereby optimizing the formal verification proof process and reducing unnecessary computations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the same set of properties is checked repeatedly during assertion-based formal verification, then verification completeness is improved, but computational burden and processing time increase significantly

Engineering Contradiction:
Improveverification completenessVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent calculates and stores unique signature values for all properties before the formal verification process begins. This preliminary action enables the system to quickly identify which properties have changed during verification by comparing current signature values against stored baseline values, avoiding the need to re-verify unchanged properties and thus reducing processing time while maintaining verification completeness

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts only the essential characteristics of each property into a unique signature value (using hash functions). By working with these compact signatures rather than full property definitions, the system can efficiently compare properties to detect changes, significantly reducing computational overhead while preserving the ability to identify all properties requiring re-verification

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If the same set of properties is checked repeatedly during assertion-based formal verification, then verification thoroughness is improved, but resource consumption increases

Engineering Contradiction:
Improveverification thoroughnessVSAvoidcomputational resource usage
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the essential identity of each property into a compact unique signature value using hash functions. This extraction allows the verification system to perform lightweight signature comparisons instead of expensive full property re-evaluations, dramatically reducing computational resource usage while maintaining thorough verification of all changed properties

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates and stores copies of property signature values as baseline references before verification begins. During verification, these stored signature copies are compared against newly calculated signatures to identify changes, enabling efficient resource utilization while ensuring all properties requiring verification are properly checked

Inventive Principle:
Principle #26Copying

3Measurement precision

If property checking is reiterated on all properties each time, then verification accuracy is maintained, but computational efficiency deteriorates

Engineering Contradiction:
Improveverification accuracyVSAvoidcomputational efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent performs preliminary calculation and storage of unique signature values for all properties before the verification process. This preliminary action establishes accurate baseline references that enable efficient change detection, allowing the system to maintain verification accuracy by precisely identifying which properties have changed while dramatically improving computational efficiency by avoiding redundant checks of unchanged properties

Inventive Principle:
Principle #10Preliminary action

4Reliability

If all properties are re-verified after any design change, then verification reliability is maintained, but processing speed decreases

Engineering Contradiction:
Improveverification reliabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent extracts the essential identity of each property into a unique signature value that can be quickly computed and compared. This extraction enables rapid identification of changed properties after design modifications, maintaining verification reliability by ensuring all changed properties are re-verified while significantly improving processing speed through efficient signature-based change detection

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent enables the verification system to skip unchanged properties by comparing signature values. Properties whose signatures match the stored baseline are rapidly identified as unchanged and skipped, allowing the system to maintain verification reliability by focusing only on changed properties while dramatically improving processing speed

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS11520964B1Method and system for assertion-based formal verification using unique signature values
Publication Date: 2022.12.06 CADENCE DESIGN SYST INC
  • US11520964B1 patent drawing
  • US11520964B1 patent drawing
  • US11520964B1 patent drawing

AI summary

A method for assertion-based formal verification includes executing a plurality of formal verification regression runs on a model of an electronic design; for each of the regression runs, using a unique signature function, calculating and saving a unique signature value for each instantiation of a property of a plurality of properties of the model of the electronic design and a status result for that instantiation of the property in that regression run; and signing off a current version of the model of the electronic device and presenting as a status result for each the instantiations of a plurality of the properties of the current version of the model of the electronic design the preferred status result obtained for that instantiation of the property per the same unique signature value that was calculated for that instantiation of the property in previous runs of the plurality of formal verification regression runs.