Forwarding Entry Processing Through High-Speed Data Channels

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Solution Overview

Problem

The increasing scale and traffic volume in cloud data centers burden the CPU and PCI-E bus in processing forwarding entries, particularly during service recovery, affecting efficiency.

Innovation Solution

A method and apparatus that utilize a forwarding chip to process forwarding entries through high-speed data channels, bypassing the CPU and using a high-speed bus between the forwarding chip and memory, reducing CPU load and improving processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the CPU generates and delivers forwarding entries through the PCI-E bus, then the forwarding entries can be stored in memory, but the CPU becomes heavily burdened and processing efficiency decreases

Engineering Contradiction:

Improveforwarding entry processing efficiencyVSAvoidCPU load

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the forwarding entry generation and delivery function from the CPU to a dedicated forwarding entry processing unit. This separation removes the burden from the CPU, allowing it to focus on control plane tasks while the dedicated unit handles forwarding entry operations through high-speed data channels and bypasses the PCI-E bus for memory access.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a forwarding chip as an intermediary component between the control plane and memory. This forwarding chip receives forwarding entries from the CPU via high-speed data channels and directly accesses memory, acting as a mediator that eliminates the need for the CPU to use the PCI-E bus for memory access, thereby improving processing efficiency.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If the PCI-E bus is used to deliver forwarding entries from CPU to memory, then data can be transmitted, but the processing capability of the PCI-E bus limits the efficiency of processing forwarding entries

Engineering Contradiction:

Improveforwarding entry processing efficiencyVSAvoidPCI-E bus transmission speed

Core Design Contradiction:

ProductivityVSSpeed

Solution Approach 1:

The patent replaces the PCI-E bus mechanism with high-speed data channels that have superior transmission capabilities. These data channels provide faster bandwidth and lower latency for forwarding entry delivery, eliminating the bottleneck imposed by the PCI-E bus architecture.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the communication dimension by introducing a direct high-speed data path between the forwarding chip and memory, bypassing the traditional CPU-PCI-E bus-memory architecture. This dimensional change in the data flow path enables significantly faster processing speeds.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12463901B2Method and apparatus for processing forwarding entry

Publication Date: 2025.11.04 HUAWEI TECH CO LTD

AI summary

A method and an apparatus for processing a forwarding entry are disclosed. The method for processing a forwarding entry includes: receiving an entry operation packet through a first data channel; parsing the entry operation packet to obtain forwarding entry operation information; and performing a target operation on a memory based on the forwarding entry operation information, where the target operation includes adding an entry, deleting an entry, or modifying an entry.