Four-Color Sub-Pixel Layout for Faster Display Data Charging
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Solution Overview
Problem
As display panels become larger, the increased driving frequency in DRD (Double Rate Driving) results in reduced time for charging data voltage, leading to incomplete data charging and potential defects such as luminance deviations and screen abnormalities due to varying circuit element degradation.
Innovation Solution
The display device incorporates a sensing function to detect the threshold voltage and mobility of driving transistors, allowing for compensation of data voltage, and a novel layout of sub-pixels and data lines that reduce RC delay, ensuring consistent data charging rates and improved luminance uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the driving frequency is increased to smoothly drive larger display panels, then the display refresh rate is improved, but the time for charging data voltage is reduced leading to incomplete charging
Solution Approach 1:
The patent applies preliminary action by performing data voltage charging in two stages: first charging to an intermediate voltage level, then charging to the final voltage level. This preliminary charging approach allows the display to operate at higher refresh rates while ensuring complete data voltage charging within the reduced time window.
Solution Approach 2:
The patent implements periodic action by dividing the data voltage charging process into multiple periodic phases corresponding to different gate signal periods. Data lines charge sub-pixels during specific gate signal periods, creating a periodic charging pattern that accommodates high refresh rates while ensuring adequate charging time through multiple charging opportunities.
2Productivity
If data voltage charging time is reduced due to increased driving frequency, then display refresh rate is improved, but luminance uniformity deteriorates due to incomplete charging
Solution Approach 1:
The patent ensures luminance uniformity by performing preliminary charging to an intermediate voltage level during the first gate signal period, then completing the charging to the final voltage level during the second gate signal period. This two-stage preliminary action guarantees that all sub-pixels receive complete charging regardless of the reduced total charging time, maintaining consistent luminance across the display.
Solution Approach 2:
The patent maintains continuous useful action by overlapping data voltage charging operations with gate signal periods. Multiple data lines charge different sub-pixels continuously across successive gate signal periods, ensuring that charging action is uninterrupted and complete, thereby maintaining luminance uniformity even at high refresh rates.
3Reliability
If more data lines are used to charge sub-pixels, then data voltage charging completeness is improved, but the number of circuit elements increases leading to greater degradation variation
Solution Approach 1:
The patent applies segmentation by dividing the data voltage charging function across multiple data lines that operate in sequence during different gate signal periods. Each data line charges a specific subset of sub-pixels, segmenting the overall charging task. This ensures complete charging of all sub-pixels while managing circuit element count by reusing gate lines and organizing data lines efficiently.
Solution Approach 2:
The patent implements universality by making gate lines serve multiple functions: they control switching transistors during data voltage charging phases and also control driving transistors during light emission phases. This multi-functionality reduces the need for separate dedicated control lines, thereby limiting the increase in circuit element count while maintaining complete data voltage charging.
Data Source
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AI summary
A display device according to an exemplary embodiment of the present disclosure includes a display panel in which a plurality of pixels including a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel that have different colors are disposed; a data driver configured to supply data voltages to the plurality of pixels through a plurality of data lines; and a gate driver configured to supply gate signals to the plurality of pixels through a plurality of gate lines; wherein the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel are sequentially disposed in the same column, so that it is possible to improve a charging rate of a data voltage.