Four-Layer PCB Design for Cost Reduction and Signal Integrity
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Solution Overview
Problem
Existing six-layer HDI printed circuit boards have high fabrication costs due to excessive processes and numerous material layers, making them difficult to manufacture thinly and leading to increased costs for thinner boards.
Innovation Solution
A four-layer printed circuit board design is implemented, where signal lines are wired on an area basis at inner layers adjacent to outer surface layers, with outer surface layers having minimal wiring and interconnected as a primary ground through vias, and parameters such as line width and layer height are set to control target impedance values, reducing fabrication costs while maintaining performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a six-layer HDI board structure is used, then signal quality and insulation strength are improved, but fabrication cost increases and board thickness cannot be reduced
Solution Approach 1:
The patent segments the six-layer board structure into functional groups and reconfigures them into a four-layer structure. Specifically, it combines certain ground layers and signal layers, using via connections to maintain electrical isolation where needed while reducing the total layer count. This segmentation approach maintains signal quality by preserving critical signal-ground relationships while eliminating redundant layers that increase cost and complexity.
Solution Approach 2:
The patent merges adjacent ground layers and combines certain signal routing functions into fewer layers. By consolidating multiple ground planes into optimized ground layers and using via fences and via connections to maintain electromagnetic shielding, the design achieves equivalent or superior signal integrity with reduced layer count, thereby lowering fabrication costs and enabling thinner boards.
2Strength
If a six-layer HDI board structure is used, then insulation strength between layers is improved, but board thickness cannot be reduced and material consumption increases
Solution Approach 1:
The patent changes the structural parameters by reducing from six layers to four layers, thereby reducing board thickness. It compensates for the reduced layer count by optimizing dielectric material selection and thickness distribution, ensuring that insulation strength between remaining layers meets or exceeds the original six-layer configuration. This parameter change enables thinner boards without sacrificing electrical insulation performance.
3Adaptability or versatility
If numerous board material layers are used, then signal routing flexibility is improved, but fabrication processes become excessive and cycle time increases
Solution Approach 1:
The patent segments signal routing functions across the four layers strategically, placing high-speed signals on inner layers with dedicated ground planes for shielding, while using outer layers for I/O and connector interfaces. This segmented approach maintains routing flexibility by assigning specific functions to specific layers, reducing the need for complex via transitions between layers and thereby shortening fabrication cycle time compared to a six-layer design.
4Ease of manufacture
If a four-layer board design is implemented, then fabrication cost is reduced and board thickness is decreased, but signal quality must be maintained
Solution Approach 1:
The patent applies local quality by providing enhanced ground planes and via shielding specifically at critical signal routing locations on the four-layer board. Instead of uniformly distributing layers, it concentrates electromagnetic shielding and ground references where signal integrity is most vulnerable, maintaining signal quality in critical areas while using the remaining layers for power, ground, and I/O functions, thereby achieving cost reduction without compromising performance.
Solution Approach 2:
The patent uses via fences and via connections as intermediary elements to maintain electromagnetic shielding and signal integrity on the four-layer board. These via structures act as mediators between signal layers and ground layers, providing return paths and shielding equivalent to what would be achieved with additional layers, thus maintaining signal quality while reducing overall layer count and fabrication cost.
Data Source
AI summary
A printed circuit board and a design method thereof are disclosed. The design method includes: wiring signal lines on an area basis at inner layers adjacent to outer surface layers; arranging the outer surface layers with no wiring or few wirings and interconnecting the outer surface layers through vias, so that the outer surface layers function as a primary ground; and setting parameters of a line width and a layer height to control a target impedance value. The printed circuit board includes outer surface layers and two inner layers therebetween. The inner layers adjacent to the outer surface layers are used for arranging signal lines on an area basis; and the outer surface layers are arranged with no wiring or few wirings and are interconnected as a primary ground through vias. The invention also discloses a mainboard of a terminal product using the printed circuit board.