Negative-Feedback Four-Phase Generator for Accurate 25% Duty Cycles
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Solution Overview
Problem
Conventional four-phase generators face challenges such as increased system complexity and power consumption due to higher input clock frequencies, sensitivity to process variations, and limitations in scalability and phase accuracy, particularly when using filters or high-speed logic circuits.
Innovation Solution
A four-phase generator system utilizing a negative-feedback configuration with operational amplifiers and SR latches to create 90° phase shifts between output signals, operating directly from differential input signals without requiring higher input frequencies or existing quadrature inputs, and featuring tunable delay cells to maintain phase accuracy across varying conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If frequency division is achieved by using an input clock signal with higher input clock frequency, then four-phase output signals can be generated, but system complexity and power consumption increase
Solution Approach 1:
The patent changes the operating parameters by using an input clock frequency that is exactly four times the output frequency rather than requiring higher frequencies. This parameter optimization allows the use of simple logic gates (AND, OR, NOT) to achieve frequency division and phase generation without requiring high-speed circuits, thereby reducing system complexity and power consumption while maintaining the desired four-phase output
2Manufacturing precision
If a filter is employed to generate 90° phase shifts, then phase-shifted output signals can be generated, but the solution becomes sensitive to process variations and not easily scalable
Solution Approach 1:
The patent replaces the mechanical/filter-based phase shifting approach with a logic circuit-based approach using AND, OR, and NOT gates. This substitution eliminates the need for filters that require precise tuning and are sensitive to process variations. The logic gate implementation provides robust phase shifting that is easily scalable to different frequencies and less susceptible to manufacturing tolerances
Solution Approach 2:
The logic circuit configuration allows the system to automatically generate the required 90-degree phase shifts through the inherent timing relationships of the logic gates driven by the clock signal, without requiring external tuning or adjustment mechanisms that would reduce scalability
3Productivity
If high-speed logic combination is employed to generate four-phase outputs, then output signals can be generated quickly, but additional phase error is introduced
Solution Approach 1:
The patent incorporates feedback mechanisms through the interconnected logic gates where the output of each gate feeds into subsequent stages. This feedback arrangement allows the circuit to self-correct timing deviations and maintain accurate phase relationships. The feedback loops ensure that phase errors are minimized while maintaining high-speed operation, as the circuit automatically adjusts to maintain the desired four-phase output
Data Source
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AI summary
A four-phase (or multi-phase) generation circuit, related method of operation, and transceivers or other systems utilizing such a circuit, are disclosed herein. In one example embodiment, the circuit includes two input ports respectively configured to receive positive and negative differential input signals, and four output ports respectively configured to output first, second, third and fourth output signals, respectively, the second, third, and fourth output signals being respectively phase-shifted relative to the first output signal by or substantially by 90, 180, and 270 degrees. Also, the circuit includes four SR latches respectively including output terminals that are respectively coupled to the respective output ports. Further, the circuit includes two tunable delay circuits respectively coupled at least indirectly between the input ports and latches, and two comparison circuits configured to output respective feedback signals. The latches receive two delayed input signals provided by the delay circuits based upon the feedback signals.