Transparent Four-Rank Memory Module Emulator
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Solution Overview
Problem
Standard memory modules can only accommodate two ranks, limiting the density of memory devices that can be fitted into a memory socket, as four ranks require additional space that standard modules do not provide, and existing solutions to stack devices are not viable due to the lack of chip select signals.
Innovation Solution
A transparent four rank memory module is designed with a front and back side, where each side has two ranks stacked, and an emulator (CPLD) controls which rank is active based on signals from the memory controller, allowing the module to function with only two chip select signals routed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If standard memory modules are used with two chip select signals, then the module fits into standard sockets, but the memory density is limited to two ranks
Solution Approach 1:
The patent introduces an emulator circuit as an intermediary component that receives the two chip select signals from the memory controller and generates four internal chip select signals. This mediator translates the limited external signals into the required internal signals, enabling four rank operation without requiring additional external signal routing.
Solution Approach 2:
The memory module is segmented into four distinct ranks, with each rank having its own chip select signal and memory devices. The emulator divides the control function into multiple segments, allowing each rank to be independently controlled through the generated internal chip select signals.
2Quantity of substance
If four ranks are implemented in a memory module, then memory density increases, but the module requires additional physical space beyond standard dimensions
Solution Approach 1:
The patent transitions from a two-dimensional layout to a three-dimensional stacked configuration. Memory devices are arranged in multiple layers stacked vertically, allowing four ranks to be accommodated within the same footprint area. This vertical stacking enables increased memory density without expanding the module's planar dimensions.
3Quantity of substance
If four ranks are implemented with stacked memory devices, then memory density increases, but the module lacks sufficient chip select signals to control all ranks
Solution Approach 1:
The emulator serves as a signal mediator that receives two external chip select signals and generates four internal chip select signals through logical operations. This signal translation mechanism provides adequate control signals for all four ranks without requiring additional external signal pins.
Solution Approach 2:
The emulator changes the parameter of chip select signals by generating additional signals through logical combinations of the input signals. By modifying the signal parameters (quantity and timing), the system achieves proper control of four ranks while maintaining compatibility with standard two-signal interfaces.
Data Source
AI summary
A transparent four rank memory module has a front side and a back side. The front side has a third memory rank stacked on a first memory rank. The back side has a fourth memory rank stacked on a second memory rank. An emulator coupled to the memory module activates and controls one individual memory rank from either the first memory rank, the second memory rank, the third memory rank, or the fourth memory rank based on the signals received from a memory controller.