Four-State Signal Emulation for X-Propagation Debugging
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Solution Overview
Problem
Existing emulation methods for identifying unpredictable behavior in digital systems, particularly in advanced processes like 22 nanometers and below, are inefficient and time-consuming due to the need to perform numerous digital logic operations to locate and debug unknown states in billions of logic circuits.
Innovation Solution
A system and method that converts digital signals and logic circuits from a two-state semantic to a four-state semantic to represent unknown states, allowing for prompt identification and propagation of improper operations, using a host system and emulator with conversion rules for Boolean logic operators, flip flops, latches, and memory circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional binary state emulation is used to identify improper operations in billions of logic circuits, then completeness of detection is improved, but emulation time and productivity deteriorate
Solution Approach 1:
The patent segments the emulation process into two distinct phases: a fast parallel propagation phase that quickly identifies potential unknown state locations, and a subsequent detailed verification phase. This segmentation allows the system to achieve both fast initial detection and comprehensive verification, resolving the contradiction between detection completeness and emulation speed.
Solution Approach 2:
The patent performs preliminary action by propagating unknown states forward through the logic circuit in advance, before complete verification is performed. This preliminary propagation identifies candidate locations of improper operations quickly, allowing the system to focus subsequent detailed verification only on these identified locations rather than examining all billions of logic circuits comprehensively.
2Measurement precision
If unknown states are propagated through billions of logic circuits to locate improper operations, then detection accuracy is improved, but time consumption increases
Solution Approach 1:
The patent segments the unknown state propagation into a fast initial pass that identifies candidate locations, followed by a targeted verification phase. This segmentation maintains locating accuracy by ensuring thorough verification of identified candidates while reducing overall time consumption by avoiding exhaustive examination of all logic circuits.
Solution Approach 2:
The patent performs preliminary propagation of unknown states to identify candidate locations of improper operations before conducting detailed verification. This preliminary action achieves accurate localization by focusing subsequent verification efforts only on the specific candidate locations identified in the preliminary pass, rather than requiring exhaustive examination of all logic circuits.
3Reliability
If comprehensive emulation is performed to verify all logic operations, then reliability of detection is improved, but emulation cycles and time required increase
Solution Approach 1:
The patent segments verification into a fast initial propagation phase and a subsequent targeted verification phase. This segmentation maintains detection reliability by ensuring that all identified candidate locations undergo thorough verification, while reducing emulation duration by limiting comprehensive verification only to these candidate locations rather than all logic circuits.
Solution Approach 2:
The patent performs preliminary propagation to identify candidate locations of improper operations before conducting detailed verification. This preliminary action ensures detection reliability by systematically identifying all potential issues, while reducing emulation duration by focusing subsequent verification efforts only on the identified candidates rather than performing exhaustive verification of all logic circuits.
Data Source
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AI summary
Embodiments relate to the emulation of circuits, and representation of unknown states of signals. A disclosed system (and method and computer program product) includes an emulation environment to convert a digital signal of a DUT in a form capable of representing an unknown state. In addition, the disclosed system converts digital logic circuits such as Boolean logic, flip flops, latches, and memory circuits to be operable with signals having unknown states. Thus, an unknown state of a signal is indicated and propagated through digital logic circuits represented in a disclosed semantic to enable prompt detection of improper operation of the DUT, for example, due to power shut down or inadequate initialization.