FO-WLP Solder Bump Printing for Complete Edge Pad Coverage

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Solution Overview

Problem

The issue with stencil printing of solder paste in fan-out wafer-level packages (FO-WLP) is the formation of voids, leading to inconsistent bump height and irregularly shaped bumps, particularly affecting non-circular UBM pads, especially those at the edges of pad groupings, resulting in incomplete coverage.

Innovation Solution

The use of stencil openings that are larger than the UBM pads to allow for excess solder paste deposition, which is then reflowed to form consistent and complete solder bumps by extending beyond the pad footprint, reducing voids and ensuring complete coverage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If stencil openings are sized to match UBM pad footprint, then material usage is optimized, but solder coverage becomes incomplete especially at pad peripheries and edges

Engineering Contradiction:
Improvesolder paste usageVSAvoidsolder bump coverage uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The stencil opening size is differentiated based on pad location: inner pads receive standard-sized openings matching their footprint, while outer pads at edges receive enlarged openings. This local differentiation ensures complete solder coverage at critical edge locations without excessive material usage on inner pads.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Enlarged stencil openings are applied selectively to outer pads where additional solder paste deposition exceeds the pad footprint. This excessive action compensates for solder loss during reflow and ensures complete coverage at vulnerable edge locations.

Inventive Principle:
Principle #16Partial or excessive action

2Manufacturing precision

If stencil openings are enlarged beyond UBM pad footprint, then solder coverage and bump consistency improve, but solder paste consumption increases

Engineering Contradiction:
Improvesolder bump height consistencyVSAvoidsolder paste consumption
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

Enlarged stencil openings are applied selectively only to outer pads at edges where coverage issues occur, while inner pads maintain standard-sized openings. This localized approach improves bump consistency where needed without excessive material consumption across all pads.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If uniform stencil opening size is used for all pads, then manufacturing process is simplified, but edge pads suffer from incomplete solder coverage

Engineering Contradiction:
Improvestencil fabrication simplicityVSAvoidsolder bump coverage completeness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The stencil is designed with differentiated opening sizes: standard openings for inner pads and enlarged openings for outer pads. This local differentiation ensures complete solder coverage at edge locations while maintaining a relatively simple overall stencil design.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The pad array is segmented into inner pads and outer pads based on their coverage requirements. This segmentation allows the stencil to apply different opening sizes to different segments, ensuring each receives appropriate solder volume.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method ensures consistent bump height and complete coverage of UBM pads, reducing defects and costs by minimizing solder voids, especially at the edges of pad groupings.

Implementation Method 1

A solder paste is disposed into stencil openings on the UBM pads and then reflowed to form a solder bump

Methodology Applied
Scientific EffectReflow: Phase Change

Data Source

PatentUS20250343195A1Semiconductor Devices and Methods of Making and Using Solder Bumps on FO-WLP
Publication Date: 2025.11.06 STATS CHIPPAC LTD
  • US20250343195A1 patent drawing
  • US20250343195A1 patent drawing
  • US20250343195A1 patent drawing

AI summary

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. An interconnect structure is formed over the semiconductor die and encapsulant. A first under-bump metallization (UBM) pad is formed over the interconnect structure. The first UBM pad is non-circular. A stencil is disposed over the first UBM pad. The stencil includes a first opening over the first UBM pad with a footprint of the first opening larger than a footprint of the first UBM pad. A solder paste is deposited in the first opening. The solder paste is reflowed to form a solder bump on the UBM pad.