Floating-Point Adder Bypass for Precision and Power
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Solution Overview
Problem
Graphics processors face challenges in accurately performing compound equations involving multiple multiplications and additions of floating-point numbers, particularly in maintaining precision and reducing power consumption while handling three or four term instructions, where errors can occur due to cancellation of terms with similar magnitudes but opposite signs.
Innovation Solution
The implementation of a hardware architecture that sorts exponents and mantissas of floating-point terms, uses multiplexers and shift blocks to align terms with the largest exponent, and employs bypass mechanisms to prevent loss of lower bits, allowing for the accurate addition of terms across multiple channels, thereby reducing precision errors and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If floating-point addition is performed by directly adding terms without sorting exponents, then the computation is simpler and faster, but precision errors occur due to cancellation of terms with similar magnitudes but opposite signs
Solution Approach 1:
The patent applies preliminary action by sorting the exponents of floating-point terms before performing addition. The sort block receives exponent values and determines their order, then controls multiplexers to align terms with the largest exponent. This preliminary sorting prevents precision errors during addition without requiring complex dynamic adjustment mechanisms during the addition process itself.
Solution Approach 2:
The patent segments the floating-point addition process into distinct functional blocks: a sort block for exponent sorting, multiplexers for term selection and alignment, shift blocks for mantissa adjustment, and an adder for final computation. This segmentation allows each block to perform its function efficiently with well-defined interfaces, managing overall complexity through modular design.
2Measurement precision
If hardware resources are increased to handle multiple term instructions with high precision, then computation accuracy improves, but power consumption increases
Solution Approach 1:
The patent implements universality by designing a single hardware architecture that can handle multiple term instructions (three-term plane equations, four-term dot products, linear interpolation) using the same sort block, multiplexers, shift blocks, and adder. This multi-functional design avoids duplicating hardware resources for different instruction types, reducing overall power consumption while maintaining precision across all operation types.
Solution Approach 2:
The patent applies discarding and recovering by using bypass mechanisms that selectively discard addition operations when terms have vastly different magnitudes (where addition would not affect the result) or when precision requirements are already met. The sort block identifies such cases and controls multiplexers to bypass the adder, recovering power consumption without sacrificing necessary precision.
3Measurement precision
If all floating-point terms are added using full precision alignment, then computation accuracy is maximized, but throughput decreases due to increased processing time
Solution Approach 1:
The patent applies partial action by performing full precision alignment only when necessary. The sort block and bypass logic identify cases where terms have similar magnitudes and require full alignment, versus cases where magnitude differences make full alignment unnecessary. This selective approach maintains precision where needed while reducing processing time elsewhere, improving overall throughput.
Solution Approach 2:
The patent implements dynamics through conditional bypass mechanisms that adapt the addition process based on exponent comparisons. The sort block dynamically determines which terms require alignment and which can be bypassed, controlling multiplexers in real-time based on the specific input data characteristics. This dynamic adaptation optimizes throughput for each operation while maintaining necessary precision.
Data Source
AI summary
Floating point compound equations that involve addition of at least three terms, where each term involves a multiplication, can be implemented by using a bypass to prevent small, remaining values from being lost when shifted.