Floating-Point Adder Forwarding for Bubble-Free Dependent Adds
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Solution Overview
Problem
Pipelined floating-point adders experience performance degradation due to pipeline bubbles when dependent floating-point additions are performed, as one operation waits on the result of another, leading to inefficiencies in processor performance.
Innovation Solution
Implement a two-stage floating-point adder with a forwarding path for un-normalized mantissa results, allowing sequential execution of dependent add instructions without pipeline bubbles by sharing left-shift circuitry and correcting leading zero anticipation outputs, thus hiding normalization latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional pipelined floating-point adder is used, then area and power consumption are minimized, but pipeline bubbles occur when dependent additions are performed, reducing performance
Solution Approach 1:
The patent performs left-shift operation on the mantissa result in advance, before normalization is complete. The un-normalized mantissa result is left-shifted by the leading zero count, and this pre-shifted result is forwarded to the next dependent addition operation, eliminating the need to wait for normalization to finish.
Solution Approach 2:
The patent introduces a forwarding path that acts as an intermediary between the first adder stage and the second adder stage. This forwarding path captures the un-normalized mantissa result, performs the left-shift operation, and delivers the shifted result directly to the next addition operation, bypassing the traditional normalization bottleneck.
2Productivity
If forwarding path with left-shift circuitry is added, then pipeline bubbles are eliminated and performance improves, but area and power consumption increase
Solution Approach 1:
The left-shift circuitry is designed to serve multiple functions: it performs the left-shift operation on un-normalized mantissa results for forwarding, and can also perform left-shift operations on normalized results for final output preparation. This multi-functionality reduces the need for separate dedicated circuits.
Solution Approach 2:
The patent changes the state parameter of the mantissa result by performing a left-shift operation based on the leading zero count. This parameter change (shifting the mantissa by a variable amount) transforms the un-normalized result into a form suitable for immediate use in the next dependent addition operation.
Data Source
AI summary
Techniques are disclosed relating to floating-point add pipelines. In some embodiments, floating-point add pipeline circuitry configured to perform a first add operation followed by a second add operation, where the second add operation specifies a first input operand that corresponds to a result of the first add operation. Adder circuitry may add mantissa values to generate a mantissa result. Forward circuitry may forward an un-normalized mantissa result from the adder circuitry as an input operand for the second add operation and exponent information from the first add operation. Left-shift circuitry may, prior to the adder circuitry in the pipeline, left-shift the un-normalized mantissa result based on the exponent information. The adder circuitry may add the shifted mantissa result for the second add operation. Disclosed techniques may allow execution of dependent add instructions, in a two-stage pipeline, without bubbles.